2020-09-05 16:51:10 +00:00
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/* ReC98
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* -----
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2021-09-06 18:16:39 +00:00
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* Declarations to help decompiling the seemingly impossible
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2020-09-05 16:51:10 +00:00
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*/
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// Flag comparisons
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// ----------------
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// When used inside a conditional expression like
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// if(FLAGS_*) { goto some_label; | return; }
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2020-09-05 17:03:48 +00:00
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// these assemble into the single given instruction. Apply the ! operator to
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// get the N versions.
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2022-08-04 13:29:34 +00:00
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2020-11-08 20:04:36 +00:00
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#define FLAGS_CARRY (_FLAGS & 0x01) /* JC / JAE / JB */
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2020-09-05 16:51:10 +00:00
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#define FLAGS_ZERO (_FLAGS & 0x40) /* JZ */
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2020-11-06 13:37:10 +00:00
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#define FLAGS_SIGN (_FLAGS & 0x80) /* JS */
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2020-09-05 16:51:10 +00:00
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// ----------------
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2020-09-11 23:51:37 +00:00
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2020-11-01 19:09:18 +00:00
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// Alternate version that doesn't spill the port number to DX
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2022-02-12 22:36:00 +00:00
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#define outportb2(port, val) _asm { \
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2020-11-01 19:09:18 +00:00
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mov al, val; \
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out port, al; \
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}
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2020-09-11 23:51:37 +00:00
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// Alternate version that sets the value first
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2022-02-12 22:36:00 +00:00
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#define outport2(port, val) _asm { \
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2020-09-11 23:51:37 +00:00
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mov ax, val; \
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mov dx, port; \
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out dx, ax; \
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}
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2020-11-06 13:37:10 +00:00
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2021-09-06 18:16:39 +00:00
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// Should just be unwrapped wherever it appears. Code that directly uses T
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// would be much cleaner.
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template <class T> union StupidBytewiseWrapperAround {
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T t;
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int8_t byte[sizeof(T)];
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uint8_t ubyte[sizeof(T)];
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};
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2022-04-04 04:12:44 +00:00
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// Does exactly the same as Turbo C++'s __memcpy__() intrinsic, just with
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// stupidly reordered instructions. Can be replaced with regular copy
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// assignment wherever it appears.
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#if (GAME == 5)
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#define copy_near_struct_member(dst, src, src_type, member) { \
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_CX = (sizeof(dst) / sizeof(uint16_t)); \
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asm { push ds; pop es; } \
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_DI = FP_OFF(&dst); \
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_SI = FP_OFF(&src); \
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_SI += offsetof(src_type, member); \
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asm { rep movsw; } \
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}
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#else
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#define copy_near_struct_member(dst, src, src_type, member) { \
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asm { push ds; pop es; } \
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_DI = FP_OFF(&dst); \
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__memcpy__(MK_FP(_ES, _DI), &src.member, sizeof(dst)); \
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}
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#endif
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2022-04-23 19:16:28 +00:00
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// Trying to assign a `near` function to a nearfunc_t_near* outside the group
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// of the function will cause a fixup overflow error at link time. The only
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// known workaround involves lying to the compiler about the true distance of
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// the function, removing any declaration of the function from global scope to
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// prevent a redefinition error, and casting away its segment.
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// TODO: Might no longer be necessary once we can fully rely on segment names
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// for code layout, and don't have to mess with groups anymore.
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#define set_nearfunc_ptr_to_farfunc(ptr, func) { \
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void pascal far func(void); \
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ptr = reinterpret_cast<nearfunc_t_near>(func); \
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}
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2020-11-08 20:04:36 +00:00
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// poke() versions that actually inline with pseudoregisters
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// ---------------------------------------------------------
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2020-11-06 13:37:10 +00:00
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#define pokew(sgm, off, val) { *(uint16_t far *)(MK_FP(sgm, off)) = val; }
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2020-11-08 20:04:36 +00:00
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// Turbo C++ 4.0 generates wrong segment prefix opcodes for the _FS and _GS
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// pseudoregisters - 0x46 (INC SI) and 0x4E (DEC SI) rather than the correct
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// 0x64 and 0x65, respectively. These prefixes are also not supported in
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// inline assembly, which is limited to pre-386 anyway. Compiling via assembly
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// (`#pragma inline`) would work and generate the correct instructions here,
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// but that would incur yet another dependency on a 16-bit TASM, for something
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// honestly quite insignificant.
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//
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// So, can we somehow work around this issue while retaining the readability
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// of the usage code and pretending that this bug doesn't exist? Comparisons
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// with segment registers unfortunately don't inline, so something like
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// if(sgm == _FS)
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// wouldn't work, even inside a macro that replaces [sgm] with _FS. But since
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// __emit__() *does* inline, we can use function templates! The default
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// versions provide the regularly intended C code for all other registers,
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// while explicit specializations for _FS and _GS __emit__() the correct
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// instruction opcodes for all offset registers needed. Then, we only need to
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// somehow move the pseudoregisters up into the type system... which can
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// simply be done by turning them into class names via preprocessor token
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// pasting. Sure, this limits this approach to raw registers with no immediate
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// offsets, but let's hope we won't ever need those...
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//
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// Also, hey, no need for the MK_FP() macro if we directly return the correct
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// types.
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2021-01-26 15:33:06 +00:00
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2021-03-07 12:07:29 +00:00
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#if defined(__TURBOC__) && defined(__MSDOS__)
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// Declared in <dos.h> in these compilers.
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void __emit__(uint8_t __byte, ...);
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#endif
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2020-11-09 14:34:53 +00:00
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2021-03-07 12:07:29 +00:00
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struct Decomp_ES { void __seg* value() { return (void __seg *)(_ES); } };
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struct Decomp_FS { void __seg* value() { return (void __seg *)(_FS); } };
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struct Decomp_GS { void __seg* value() { return (void __seg *)(_GS); } };
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struct Decomp_DI { void __near* value() { return (void __near *)(_DI); } };
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2020-11-08 20:04:36 +00:00
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2021-03-07 12:07:29 +00:00
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// Removing [val] from the parameter lists of the template functions below
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// perfects the inlining.
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#define poked(sgm, off, val) \
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_EAX = val; \
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2022-06-26 09:32:25 +00:00
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poked_eax((Decomp##sgm *)nullptr, (Decomp##off *)nullptr, (uint8_t)(0x89));
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2020-11-08 20:04:36 +00:00
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2021-03-07 12:07:29 +00:00
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#define poke_or_d(sgm, off, val) \
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_EAX = val; \
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2022-06-26 09:32:25 +00:00
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poked_eax((Decomp##sgm *)nullptr, (Decomp##off *)nullptr, (uint8_t)(0x09));
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2020-11-08 20:04:36 +00:00
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2021-03-07 12:07:29 +00:00
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template <class Segment, class Offset> inline void poked_eax(
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Segment *sgm, Offset *off, uint8_t op
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) {
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if(op == 0x89) {
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*(uint32_t far *)(sgm->value() + off->value()) = _EAX;
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} else if(op == 0x09) {
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*(uint32_t far *)(sgm->value() + off->value()) |= _EAX;
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2020-11-08 20:04:36 +00:00
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}
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2021-03-07 12:07:29 +00:00
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}
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inline void poked_eax(Decomp_FS *sgm, Decomp_DI *off, uint8_t op) {
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__emit__(0x66, 0x64, op, 0x05); // [op] FS:[DI], EAX
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}
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inline void poked_eax(Decomp_GS *sgm, Decomp_DI *off, uint8_t op) {
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__emit__(0x66, 0x65, op, 0x05); // [op] GS:[DI], EAX
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}
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2021-05-30 18:09:31 +00:00
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// ---------------------------------------------------------
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2022-01-11 18:26:28 +00:00
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// Circumventing compiler optimizations
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// ------------------------------------
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// If you don't want to recreate the code layout of the original PC-98
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// binaries, these can be safely deleted. They just make the code worse.
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2021-05-30 18:09:31 +00:00
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#if defined(__TURBOC__) && defined(__MSDOS__)
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// Use this function wherever the original code used a immediate 0 literal
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// that Turbo C++ would optimize away, e.g. in register assignments
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// (_AX = 0 → XOR AX, AX) or comparisons (_AX == 0 → OR AX, AX). This way,
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// the compiler is forced to leave space for any potential offset, with the
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// literal 0 then being spelled out by the linker.
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template <class T> inline T keep_0(T x) {
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if(x == 0) {
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extern void *near address_0;
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return reinterpret_cast<pixel_t>(&address_0);
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}
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return x;
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}
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2022-01-11 18:26:28 +00:00
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// Bypasses the -Z -3 function parameter optimization, where [x] would be
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// combined with any potential subsequent 16-bit parameter adjacent in
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// memory to form a 32-bit PUSH.
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// (Interestingly, using a template function inlines either too well or
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// too badly. Only this macro guarantees the intended 16-bit PUSH to be
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// consistently emitted.)
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2022-06-24 21:25:08 +00:00
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#define inhibit_Z3(x) \
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*reinterpret_cast<int16_t near *>(reinterpret_cast<uint16_t>(&x))
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2022-01-11 18:26:28 +00:00
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2022-07-09 19:40:53 +00:00
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// Calling an empty inlined function prevents certain jump optimizations.
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inline void optimization_barrier(void) {
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}
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2021-05-30 18:09:31 +00:00
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#else
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#define keep_0(x) x
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2022-06-24 21:25:08 +00:00
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#define inhibit_Z3(x) x
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2022-07-09 19:40:53 +00:00
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#define optimization_barrier()
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2021-05-30 18:09:31 +00:00
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#endif
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2022-01-11 18:26:28 +00:00
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// ------------------------------------
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2020-11-08 20:04:36 +00:00
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2022-05-11 14:37:53 +00:00
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// Neither WAIT nor FWAIT emit the emulated WAIT we want...
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#define FWAIT_EMU db 0xCD, 0x3D;
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2020-11-08 20:04:36 +00:00
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// 32-bit ASM instructions not supported by Turbo C++ 4.0J's built-in
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// assembler. Makes no sense to compile with `#pragma inline` (and thus,
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// require a 16-bit TASM) just for those.
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#define MOVSD __emit__(0x66, 0xA5);
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#define REP __emit__(0xF3);
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