2020-09-05 16:51:10 +00:00
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/* ReC98
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* -----
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* Macros to help decompiling the seemingly impossible
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*/
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// Flag comparisons
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// ----------------
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// When used inside a conditional expression like
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// if(FLAGS_*) { goto some_label; | return; }
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2020-09-05 17:03:48 +00:00
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// these assemble into the single given instruction. Apply the ! operator to
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// get the N versions.
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2020-11-08 20:04:36 +00:00
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#define FLAGS_CARRY (_FLAGS & 0x01) /* JC / JAE / JB */
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2020-09-05 16:51:10 +00:00
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#define FLAGS_ZERO (_FLAGS & 0x40) /* JZ */
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2020-11-06 13:37:10 +00:00
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#define FLAGS_SIGN (_FLAGS & 0x80) /* JS */
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2020-09-05 16:51:10 +00:00
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// ----------------
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2020-09-11 23:51:37 +00:00
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2020-11-01 19:09:18 +00:00
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// Alternate version that doesn't spill the port number to DX
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#define outportb2(port, val) __asm { \
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mov al, val; \
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out port, al; \
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}
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2020-09-11 23:51:37 +00:00
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// Alternate version that sets the value first
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2020-11-06 21:24:00 +00:00
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#define outport2(port, val) __asm { \
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2020-09-11 23:51:37 +00:00
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mov ax, val; \
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mov dx, port; \
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out dx, ax; \
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}
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2020-11-06 13:37:10 +00:00
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2020-11-08 20:04:36 +00:00
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// poke() versions that actually inline with pseudoregisters
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// ---------------------------------------------------------
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2020-11-06 13:37:10 +00:00
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#define pokew(sgm, off, val) { *(uint16_t far *)(MK_FP(sgm, off)) = val; }
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2020-11-08 20:04:36 +00:00
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// Turbo C++ 4.0 generates wrong segment prefix opcodes for the _FS and _GS
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// pseudoregisters - 0x46 (INC SI) and 0x4E (DEC SI) rather than the correct
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// 0x64 and 0x65, respectively. These prefixes are also not supported in
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// inline assembly, which is limited to pre-386 anyway. Compiling via assembly
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// (`#pragma inline`) would work and generate the correct instructions here,
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// but that would incur yet another dependency on a 16-bit TASM, for something
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// honestly quite insignificant.
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//
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// So, can we somehow work around this issue while retaining the readability
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// of the usage code and pretending that this bug doesn't exist? Comparisons
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// with segment registers unfortunately don't inline, so something like
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// if(sgm == _FS)
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// wouldn't work, even inside a macro that replaces [sgm] with _FS. But since
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// __emit__() *does* inline, we can use function templates! The default
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// versions provide the regularly intended C code for all other registers,
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// while explicit specializations for _FS and _GS __emit__() the correct
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// instruction opcodes for all offset registers needed. Then, we only need to
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// somehow move the pseudoregisters up into the type system... which can
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// simply be done by turning them into class names via preprocessor token
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// pasting. Sure, this limits this approach to raw registers with no immediate
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// offsets, but let's hope we won't ever need those...
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//
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// Also, hey, no need for the MK_FP() macro if we directly return the correct
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// types.
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#ifdef __cplusplus
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}
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2021-01-26 15:33:06 +00:00
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#if defined(__TURBOC__) && defined(__MSDOS__)
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// Declared in <dos.h> in these compilers.
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2021-02-07 20:03:00 +00:00
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void __emit__(uint8_t __byte, ...);
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2021-01-26 15:33:06 +00:00
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#endif
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2020-11-09 14:34:53 +00:00
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struct Decomp_ES { void __seg* value() { return (void __seg *)(_ES); } };
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2020-11-08 20:04:36 +00:00
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struct Decomp_FS { void __seg* value() { return (void __seg *)(_FS); } };
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struct Decomp_GS { void __seg* value() { return (void __seg *)(_GS); } };
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struct Decomp_DI { void __near* value() { return (void __near *)(_DI); } };
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// Removing [val] from the parameter lists of the template functions below
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// perfects the inlining.
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#define poked(sgm, off, val) \
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_EAX = val; \
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2020-11-09 14:34:53 +00:00
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poked_eax((Decomp##sgm *)NULL, (Decomp##off *)NULL, (uint8_t)(0x89));
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#define poke_or_d(sgm, off, val) \
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_EAX = val; \
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poked_eax((Decomp##sgm *)NULL, (Decomp##off *)NULL, (uint8_t)(0x09));
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2020-11-08 20:04:36 +00:00
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template <class Segment, class Offset> inline void poked_eax(
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2020-11-09 14:34:53 +00:00
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Segment *sgm, Offset *off, uint8_t op
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2020-11-08 20:04:36 +00:00
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) {
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2020-11-09 14:34:53 +00:00
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if(op == 0x89) {
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*(uint32_t far *)(sgm->value() + off->value()) = _EAX;
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} else if(op == 0x09) {
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*(uint32_t far *)(sgm->value() + off->value()) |= _EAX;
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}
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2020-11-08 20:04:36 +00:00
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}
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2020-11-09 14:34:53 +00:00
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inline void poked_eax(Decomp_FS *sgm, Decomp_DI *off, uint8_t op) {
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__emit__(0x66, 0x64, op, 0x05); // [op] FS:[DI], EAX
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2020-11-08 20:04:36 +00:00
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}
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2020-11-09 14:34:53 +00:00
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inline void poked_eax(Decomp_GS *sgm, Decomp_DI *off, uint8_t op) {
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__emit__(0x66, 0x65, op, 0x05); // [op] GS:[DI], EAX
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2020-11-08 20:04:36 +00:00
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}
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extern "C" {
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#endif
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// ---------------------------------------------------------
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// 32-bit ASM instructions not supported by Turbo C++ 4.0J's built-in
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// assembler. Makes no sense to compile with `#pragma inline` (and thus,
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// require a 16-bit TASM) just for those.
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#define MOVSD __emit__(0x66, 0xA5);
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#define REP __emit__(0xF3);
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