mirror of https://github.com/Washi1337/Emux.git
631 lines
74 KiB
C#
631 lines
74 KiB
C#
using System;
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using static Emux.GameBoy.Cpu.RegisterFlags;
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using static Emux.GameBoy.Cpu.InterruptVector;
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namespace Emux.GameBoy.Cpu
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{
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public static class Z80OpCodes
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{
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public const byte ExtendedTableOpcode = 0xCB;
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public static readonly Z80OpCode[] SingleByteOpCodes =
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{
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// 0x00 ... 0x0F
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new Z80OpCode("nop", 0x00, 0x00, 0, 4, (_, __) => { }),
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new Z80OpCode("ld bc, {0:x4}", 0x01, 0x00, 2, 12, (d, i) => d.Cpu.Registers.BC = i.Operand16),
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new Z80OpCode("ld (bc), a", 0x02, 0x00, 0, 8, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.BC, d.Cpu.Registers.A)),
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new Z80OpCode("inc bc", 0x03, 0x00, 0, 8, (d, i) => d.Cpu.Registers.BC = d.Cpu.Alu.Increment(d.Cpu.Registers.BC)),
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new Z80OpCode("inc b", 0x04, 0x00, 0, 4, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Increment(d.Cpu.Registers.B, Z | H, None, N)),
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new Z80OpCode("dec b", 0x05, 0x00, 0, 4, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Decrement(d.Cpu.Registers.B, Z | H, N)),
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new Z80OpCode("ld b, {0:x2}", 0x06, 0x00, 1, 8, (d, i) => d.Cpu.Registers.B = i.Operand8),
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new Z80OpCode("rlca", 0x07, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Rlc(d.Cpu.Registers.A, C, None, Z | N | H)),
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new Z80OpCode("ld ({0:x4}), sp", 0x08, 0x00, 2, 20, (d, i) => d.Memory.WriteUInt16(i.Operand16, d.Cpu.Registers.SP)),
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new Z80OpCode("add hl, bc", 0x09, 0x00, 0, 8, (d, i) => d.Cpu.Registers.HL = d.Cpu.Alu.Add(d.Cpu.Registers.HL, d.Cpu.Registers.BC, H | C, None, N)),
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new Z80OpCode("ld a, (bc)", 0x0A, 0x00, 0, 8, (d, i) => d.Cpu.Registers.A = d.Memory.ReadByte(d.Cpu.Registers.BC)),
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new Z80OpCode("dec bc", 0x0B, 0x00, 0, 8, (d, i) => d.Cpu.Registers.BC = d.Cpu.Alu.Decrement(d.Cpu.Registers.BC)),
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new Z80OpCode("inc c", 0x0C, 0x00, 0, 4, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Increment(d.Cpu.Registers.C, Z | H, None, N)),
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new Z80OpCode("dec c", 0x0D, 0x00, 0, 4, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Decrement(d.Cpu.Registers.C, Z | H, N)),
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new Z80OpCode("ld c, {0:x2}", 0x0E, 0x00, 1, 8, (d, i) => d.Cpu.Registers.C = i.Operand8),
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new Z80OpCode("rrca", 0x0F, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Rrc(d.Cpu.Registers.A, C, None, Z | N | H)),
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// 0x10 ... 0x1F
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new Z80OpCode("stop", 0x10, 0x00, 0, 4, (d, e) => d.Cpu.Stop()),
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new Z80OpCode("ld de, {0:x4}", 0x11, 0x00, 2, 12, (d, i) => d.Cpu.Registers.DE = i.Operand16),
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new Z80OpCode("ld (de), a", 0x12, 0x00, 0, 8, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.DE, d.Cpu.Registers.A)),
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new Z80OpCode("inc de", 0x13, 0x00, 0, 8, (d, i) => d.Cpu.Registers.DE = d.Cpu.Alu.Increment(d.Cpu.Registers.DE)),
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new Z80OpCode("inc d", 0x14, 0x00, 0, 4, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Increment(d.Cpu.Registers.D, Z | H, None, N)),
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new Z80OpCode("dec d", 0x15, 0x00, 0, 4, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Decrement(d.Cpu.Registers.D, Z | H, N)),
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new Z80OpCode("ld d, {0:x2}", 0x16, 0x00, 1, 8, (d, i) => d.Cpu.Registers.D = i.Operand8),
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new Z80OpCode("rla", 0x17, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Rl(d.Cpu.Registers.A, C, None, Z | N | H)),
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new Z80OpCode("jr {0:x2}", 0x18, 0x00, 1, 12, (d, i) => d.Cpu.Registers.PC = (ushort) unchecked (d.Cpu.Registers.PC + (sbyte) i.Operand8)),
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new Z80OpCode("add hl, de", 0x19, 0x00, 0, 8, (d, i) => d.Cpu.Registers.HL = d.Cpu.Alu.Add(d.Cpu.Registers.HL, d.Cpu.Registers.DE, H | C, None, N)),
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new Z80OpCode("ld a, (de)", 0x1A, 0x00, 0, 8, (d, i) => d.Cpu.Registers.A = d.Memory.ReadByte(d.Cpu.Registers.DE)),
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new Z80OpCode("dec de", 0x1B, 0x00, 0, 8, (d, i) => d.Cpu.Registers.DE = d.Cpu.Alu.Decrement(d.Cpu.Registers.DE)),
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new Z80OpCode("inc e", 0x1C, 0x00, 0, 4, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Increment(d.Cpu.Registers.E, Z | H, None, N)),
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new Z80OpCode("dec e", 0x1D, 0x00, 0, 4, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Decrement(d.Cpu.Registers.E, Z | H, N)),
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new Z80OpCode("ld e, {0:x2}", 0x1E, 0x00, 1, 8, (d, i) => d.Cpu.Registers.E = i.Operand8),
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new Z80OpCode("rra", 0x1F, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Rr(d.Cpu.Registers.A, C, None ,Z | N | H)),
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// 0x20 ... 0x2F
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new Z80OpCode("jr nz, {0:x2}", 0x20, 0x00, 1, 12, 8, (d, i) => d.Cpu.JumpFlag(i.OpCode, (ushort) (d.Cpu.Registers.PC + unchecked((sbyte) i.Operand8)), !d.Cpu.Registers.GetFlags(Z))),
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new Z80OpCode("ld hl, {0:x4}", 0x21, 0x00, 2, 12, (d, i) => d.Cpu.Registers.HL = i.Operand16),
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new Z80OpCode("ld (hl+), a", 0x22, 0x00, 0, 8, (d, i) =>
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{
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d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Registers.A);
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d.Cpu.Registers.HL = d.Cpu.Alu.Increment(d.Cpu.Registers.HL);
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}),
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new Z80OpCode("inc hl", 0x23, 0x00, 0, 8, (d, i) => d.Cpu.Registers.HL = d.Cpu.Alu.Increment(d.Cpu.Registers.HL)),
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new Z80OpCode("inc h", 0x24, 0x00, 0, 4, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Increment(d.Cpu.Registers.H, Z | H, None, N)),
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new Z80OpCode("dec h", 0x25, 0x00, 0, 4, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Decrement(d.Cpu.Registers.H, Z | H, N)),
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new Z80OpCode("ld h, {0:x2}", 0x26, 0x00, 1, 8, (d, i) => d.Cpu.Registers.H = i.Operand8),
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new Z80OpCode("daa", 0x27, 0x00, 0, 4, (d, i) => d.Cpu.Alu.Daa()),
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new Z80OpCode("jr z, {0:x2}", 0x28, 0x00, 1, 12, 8, (d, i) => d.Cpu.JumpFlag(i.OpCode, (ushort) (d.Cpu.Registers.PC + unchecked((sbyte) i.Operand8)), d.Cpu.Registers.GetFlags(Z))),
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new Z80OpCode("add hl, hl", 0x29, 0x00, 0, 8, (d, i) => d.Cpu.Registers.HL = d.Cpu.Alu.Add(d.Cpu.Registers.HL, d.Cpu.Registers.HL, H | C, None, N)),
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new Z80OpCode("ld a, (hl+)", 0x2A, 0x00, 0, 8, (d, i) =>
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{
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d.Cpu.Registers.A = d.Memory.ReadByte(d.Cpu.Registers.HL);
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d.Cpu.Registers.HL = d.Cpu.Alu.Increment(d.Cpu.Registers.HL);
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}),
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new Z80OpCode("dec hl", 0x2B, 0x00, 0, 8, (d, i) => d.Cpu.Registers.HL = d.Cpu.Alu.Decrement(d.Cpu.Registers.HL)),
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new Z80OpCode("inc l", 0x2C, 0x00, 0, 4, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Increment(d.Cpu.Registers.L, Z | H, None, N)),
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new Z80OpCode("dec l", 0x2D, 0x00, 0, 4, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Decrement(d.Cpu.Registers.L, Z | H, N)),
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new Z80OpCode("ld l, {0:x2}", 0x2E, 0x00, 1, 8, (d, i) => d.Cpu.Registers.L = i.Operand8),
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new Z80OpCode("cpl", 0x2F, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Cpl(d.Cpu.Registers.A)),
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// 0x30 ... 0x3F
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new Z80OpCode("jr nc, {0:x2}", 0x30, 0x00, 1, 12, 8, (d, i) => d.Cpu.JumpFlag(i.OpCode, (ushort) (d.Cpu.Registers.PC + unchecked((sbyte) i.Operand8)), !d.Cpu.Registers.GetFlags(C))),
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new Z80OpCode("ld sp, {0:x4}", 0x31, 0x00, 2, 12, (d, i) => d.Cpu.Registers.SP = i.Operand16),
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new Z80OpCode("ld (hl-), a", 0x32, 0x00, 0, 8, (d, i) =>
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{
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d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Registers.A);
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d.Cpu.Registers.HL = d.Cpu.Alu.Decrement(d.Cpu.Registers.HL);
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}),
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new Z80OpCode("inc sp", 0x33, 0x00, 0, 8, (d, i) => d.Cpu.Registers.SP = d.Cpu.Alu.Increment(d.Cpu.Registers.SP)),
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new Z80OpCode("inc (hl)", 0x34, 0x00, 0, 12, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Increment(d.Memory.ReadByte(d.Cpu.Registers.HL), Z | H, None, N))),
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new Z80OpCode("dec (hl)", 0x35, 0x00, 0, 12, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Decrement(d.Memory.ReadByte(d.Cpu.Registers.HL), Z | H, N))),
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new Z80OpCode("ld (hl), {0:x2}", 0x36, 0x00, 1, 12, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, i.Operand8)),
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new Z80OpCode("scf", 0x37, 0x00, 0, 4, (d, i) =>
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{
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d.Cpu.Registers.SetFlags(C);
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d.Cpu.Registers.ClearFlags(N | H);
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}),
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new Z80OpCode("jr c, {0:x2}", 0x38, 0x00, 1, 12, 8, (d, i) => d.Cpu.JumpFlag(i.OpCode, (ushort) (d.Cpu.Registers.PC + unchecked((sbyte) i.Operand8)), d.Cpu.Registers.GetFlags(C))),
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new Z80OpCode("add hl, sp", 0x39, 0x00, 0, 8, (d, i) => d.Cpu.Registers.HL = d.Cpu.Alu.Add(d.Cpu.Registers.HL, d.Cpu.Registers.SP, H | C, None, N)),
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new Z80OpCode("ld a, (hl-)", 0x3A, 0x00, 0, 8, (d, i) =>
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{
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d.Cpu.Registers.A = d.Memory.ReadByte(d.Cpu.Registers.HL);
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d.Cpu.Registers.HL = d.Cpu.Alu.Decrement(d.Cpu.Registers.HL);
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}),
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new Z80OpCode("dec sp", 0x3B, 0x00, 0, 8, (d, i) => d.Cpu.Registers.SP = d.Cpu.Alu.Decrement(d.Cpu.Registers.SP)),
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new Z80OpCode("inc a", 0x3C, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Increment(d.Cpu.Registers.A, Z | H, None, N)),
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new Z80OpCode("dec a", 0x3D, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Decrement(d.Cpu.Registers.A, Z | H, N)),
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new Z80OpCode("ld a, {0:x2}", 0x3E, 0x00, 1, 8, (d, i) => d.Cpu.Registers.A = i.Operand8),
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new Z80OpCode("ccf", 0x3F, 0x00, 0, 4, (d, i) => d.Cpu.Alu.Ccf()),
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// 0x40 .. 0x4F
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new Z80OpCode("ld b, b", 0x40, 0x00, 0, 4, (d, i) => d.Cpu.Registers.B = d.Cpu.Registers.B),
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new Z80OpCode("ld b, c", 0x41, 0x00, 0, 4, (d, i) => d.Cpu.Registers.B = d.Cpu.Registers.C),
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new Z80OpCode("ld b, d", 0x42, 0x00, 0, 4, (d, i) => d.Cpu.Registers.B = d.Cpu.Registers.D),
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new Z80OpCode("ld b, e", 0x43, 0x00, 0, 4, (d, i) => d.Cpu.Registers.B = d.Cpu.Registers.E),
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new Z80OpCode("ld b, h", 0x44, 0x00, 0, 4, (d, i) => d.Cpu.Registers.B = d.Cpu.Registers.H),
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new Z80OpCode("ld b, l", 0x45, 0x00, 0, 4, (d, i) => d.Cpu.Registers.B = d.Cpu.Registers.L),
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new Z80OpCode("ld b, (hl)", 0x46, 0x00, 0, 8, (d, i) => d.Cpu.Registers.B = d.Memory.ReadByte(d.Cpu.Registers.HL)),
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new Z80OpCode("ld b, a", 0x47, 0x00, 0, 4, (d, i) => d.Cpu.Registers.B = d.Cpu.Registers.A),
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new Z80OpCode("ld c, b", 0x48, 0x00, 0, 4, (d, i) => d.Cpu.Registers.C = d.Cpu.Registers.B),
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new Z80OpCode("ld c, c", 0x49, 0x00, 0, 4, (d, i) => d.Cpu.Registers.C = d.Cpu.Registers.C),
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new Z80OpCode("ld c, d", 0x4A, 0x00, 0, 4, (d, i) => d.Cpu.Registers.C = d.Cpu.Registers.D),
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new Z80OpCode("ld c, e", 0x4B, 0x00, 0, 4, (d, i) => d.Cpu.Registers.C = d.Cpu.Registers.E),
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new Z80OpCode("ld c, h", 0x4C, 0x00, 0, 4, (d, i) => d.Cpu.Registers.C = d.Cpu.Registers.H),
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new Z80OpCode("ld c, l", 0x4D, 0x00, 0, 4, (d, i) => d.Cpu.Registers.C = d.Cpu.Registers.L),
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new Z80OpCode("ld c, (hl)", 0x4E, 0x00, 0, 8, (d, i) => d.Cpu.Registers.C = d.Memory.ReadByte(d.Cpu.Registers.HL)),
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new Z80OpCode("ld c, a", 0x4F, 0x00, 0, 4, (d, i) => d.Cpu.Registers.C = d.Cpu.Registers.A),
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// 0x50 .. 0x5F
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new Z80OpCode("ld d, b", 0x50, 0x00, 0, 4, (d, i) => d.Cpu.Registers.D = d.Cpu.Registers.B),
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new Z80OpCode("ld d, c", 0x51, 0x00, 0, 4, (d, i) => d.Cpu.Registers.D = d.Cpu.Registers.C),
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new Z80OpCode("ld d, d", 0x52, 0x00, 0, 4, (d, i) => d.Cpu.Registers.D = d.Cpu.Registers.D),
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new Z80OpCode("ld d, e", 0x53, 0x00, 0, 4, (d, i) => d.Cpu.Registers.D = d.Cpu.Registers.E),
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new Z80OpCode("ld d, h", 0x54, 0x00, 0, 4, (d, i) => d.Cpu.Registers.D = d.Cpu.Registers.H),
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new Z80OpCode("ld d, l", 0x55, 0x00, 0, 4, (d, i) => d.Cpu.Registers.D = d.Cpu.Registers.L),
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new Z80OpCode("ld d, (hl)", 0x56, 0x00, 0, 8, (d, i) => d.Cpu.Registers.D = d.Memory.ReadByte(d.Cpu.Registers.HL)),
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new Z80OpCode("ld d, a", 0x57, 0x00, 0, 4, (d, i) => d.Cpu.Registers.D = d.Cpu.Registers.A),
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new Z80OpCode("ld e, b", 0x58, 0x00, 0, 4, (d, i) => d.Cpu.Registers.E = d.Cpu.Registers.B),
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new Z80OpCode("ld e, c", 0x59, 0x00, 0, 4, (d, i) => d.Cpu.Registers.E = d.Cpu.Registers.C),
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new Z80OpCode("ld e, d", 0x5A, 0x00, 0, 4, (d, i) => d.Cpu.Registers.E = d.Cpu.Registers.D),
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new Z80OpCode("ld e, e", 0x5B, 0x00, 0, 4, (d, i) => d.Cpu.Registers.E = d.Cpu.Registers.E),
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new Z80OpCode("ld e, h", 0x5C, 0x00, 0, 4, (d, i) => d.Cpu.Registers.E = d.Cpu.Registers.H),
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new Z80OpCode("ld e, l", 0x5D, 0x00, 0, 4, (d, i) => d.Cpu.Registers.E = d.Cpu.Registers.L),
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new Z80OpCode("ld e, (hl)", 0x5E, 0x00, 0, 8, (d, i) => d.Cpu.Registers.E = d.Memory.ReadByte(d.Cpu.Registers.HL)),
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new Z80OpCode("ld e, a", 0x5F, 0x00, 0, 4, (d, i) => d.Cpu.Registers.E = d.Cpu.Registers.A),
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// 0x60 .. 0x6F
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new Z80OpCode("ld h, b", 0x60, 0x00, 0, 4, (d, i) => d.Cpu.Registers.H = d.Cpu.Registers.B),
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new Z80OpCode("ld h, c", 0x61, 0x00, 0, 4, (d, i) => d.Cpu.Registers.H = d.Cpu.Registers.C),
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new Z80OpCode("ld h, d", 0x62, 0x00, 0, 4, (d, i) => d.Cpu.Registers.H = d.Cpu.Registers.D),
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new Z80OpCode("ld h, e", 0x63, 0x00, 0, 4, (d, i) => d.Cpu.Registers.H = d.Cpu.Registers.E),
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new Z80OpCode("ld h, h", 0x64, 0x00, 0, 4, (d, i) => d.Cpu.Registers.H = d.Cpu.Registers.H),
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new Z80OpCode("ld h, l", 0x65, 0x00, 0, 4, (d, i) => d.Cpu.Registers.H = d.Cpu.Registers.L),
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new Z80OpCode("ld h, (hl)", 0x66, 0x00, 0, 8, (d, i) => d.Cpu.Registers.H = d.Memory.ReadByte(d.Cpu.Registers.HL)),
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new Z80OpCode("ld h, a", 0x67, 0x00, 0, 4, (d, i) => d.Cpu.Registers.H = d.Cpu.Registers.A),
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new Z80OpCode("ld l, b", 0x68, 0x00, 0, 4, (d, i) => d.Cpu.Registers.L = d.Cpu.Registers.B),
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new Z80OpCode("ld l, c", 0x69, 0x00, 0, 4, (d, i) => d.Cpu.Registers.L = d.Cpu.Registers.C),
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new Z80OpCode("ld l, d", 0x6A, 0x00, 0, 4, (d, i) => d.Cpu.Registers.L = d.Cpu.Registers.D),
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new Z80OpCode("ld l, e", 0x6B, 0x00, 0, 4, (d, i) => d.Cpu.Registers.L = d.Cpu.Registers.E),
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new Z80OpCode("ld l, h", 0x6C, 0x00, 0, 4, (d, i) => d.Cpu.Registers.L = d.Cpu.Registers.H),
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new Z80OpCode("ld l, l", 0x6D, 0x00, 0, 4, (d, i) => d.Cpu.Registers.L = d.Cpu.Registers.L),
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new Z80OpCode("ld l, (hl)", 0x6E, 0x00, 0, 8, (d, i) => d.Cpu.Registers.L = d.Memory.ReadByte(d.Cpu.Registers.HL)),
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new Z80OpCode("ld l, a", 0x6F, 0x00, 0, 4, (d, i) => d.Cpu.Registers.L = d.Cpu.Registers.A),
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// 0x70 .. 0x7F
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new Z80OpCode("ld (hl), b", 0x70, 0x00, 0, 8, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Registers.B)),
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new Z80OpCode("ld (hl), c", 0x71, 0x00, 0, 8, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Registers.C)),
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new Z80OpCode("ld (hl), d", 0x72, 0x00, 0, 8, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Registers.D)),
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new Z80OpCode("ld (hl), e", 0x73, 0x00, 0, 8, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Registers.E)),
|
|
new Z80OpCode("ld (hl), h", 0x74, 0x00, 0, 8, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Registers.H)),
|
|
new Z80OpCode("ld (hl), l", 0x75, 0x00, 0, 8, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Registers.L)),
|
|
new Z80OpCode("halt", 0x76, 0x00, 0, 4, (d, i) => d.Cpu.Halt()),
|
|
new Z80OpCode("ld (hl), a", 0x77, 0x00, 0, 8, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Registers.A)),
|
|
new Z80OpCode("ld a, b", 0x78, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Registers.B),
|
|
new Z80OpCode("ld a, c", 0x79, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Registers.C),
|
|
new Z80OpCode("ld a, d", 0x7A, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Registers.D),
|
|
new Z80OpCode("ld a, e", 0x7B, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Registers.E),
|
|
new Z80OpCode("ld a, h", 0x7C, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Registers.H),
|
|
new Z80OpCode("ld a, l", 0x7D, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Registers.L),
|
|
new Z80OpCode("ld a, (hl)", 0x7E, 0x00, 0, 8, (d, i) => d.Cpu.Registers.A = d.Memory.ReadByte(d.Cpu.Registers.HL)),
|
|
new Z80OpCode("ld a, a", 0x7F, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Registers.A),
|
|
|
|
// 0x80 .. 0x8F
|
|
new Z80OpCode("add a, b", 0x80, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Add(d.Cpu.Registers.A, d.Cpu.Registers.B, Z | H | C, None, N)),
|
|
new Z80OpCode("add a, c", 0x81, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Add(d.Cpu.Registers.A, d.Cpu.Registers.C, Z | H | C, None, N)),
|
|
new Z80OpCode("add a, d", 0x82, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Add(d.Cpu.Registers.A, d.Cpu.Registers.D, Z | H | C, None, N)),
|
|
new Z80OpCode("add a, e", 0x83, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Add(d.Cpu.Registers.A, d.Cpu.Registers.E, Z | H | C, None, N)),
|
|
new Z80OpCode("add a, h", 0x84, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Add(d.Cpu.Registers.A, d.Cpu.Registers.H, Z | H | C, None, N)),
|
|
new Z80OpCode("add a, l", 0x85, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Add(d.Cpu.Registers.A, d.Cpu.Registers.L, Z | H | C, None, N)),
|
|
new Z80OpCode("add a, (hl)", 0x86, 0x00, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Add(d.Cpu.Registers.A, d.Memory.ReadByte(d.Cpu.Registers.HL), Z | H | C, None, N)),
|
|
new Z80OpCode("add a, a", 0x87, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Add(d.Cpu.Registers.A, d.Cpu.Registers.A, Z | H | C, None, N)),
|
|
new Z80OpCode("adc a, b", 0x88, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Adc(d.Cpu.Registers.A, d.Cpu.Registers.B, Z | H | C, None, N)),
|
|
new Z80OpCode("adc a, c", 0x89, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Adc(d.Cpu.Registers.A, d.Cpu.Registers.C, Z | H | C, None, N)),
|
|
new Z80OpCode("adc a, d", 0x8A, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Adc(d.Cpu.Registers.A, d.Cpu.Registers.D, Z | H | C, None, N)),
|
|
new Z80OpCode("adc a, e", 0x8B, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Adc(d.Cpu.Registers.A, d.Cpu.Registers.E, Z | H | C, None, N)),
|
|
new Z80OpCode("adc a, h", 0x8C, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Adc(d.Cpu.Registers.A, d.Cpu.Registers.H, Z | H | C, None, N)),
|
|
new Z80OpCode("adc a, l", 0x8D, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Adc(d.Cpu.Registers.A, d.Cpu.Registers.L, Z | H | C, None, N)),
|
|
new Z80OpCode("adc a, (hl)", 0x8E, 0x00, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Adc(d.Cpu.Registers.A, d.Memory.ReadByte(d.Cpu.Registers.HL), Z | H | C, None, N)),
|
|
new Z80OpCode("adc a, a", 0x8F, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Adc(d.Cpu.Registers.A, d.Cpu.Registers.A, Z | H | C, None, N)),
|
|
|
|
// 0x90 .. 0x9F
|
|
new Z80OpCode("sub a, b", 0x90, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Sub(d.Cpu.Registers.A, d.Cpu.Registers.B, Z | H | C, N)),
|
|
new Z80OpCode("sub a, c", 0x91, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Sub(d.Cpu.Registers.A, d.Cpu.Registers.C, Z | H | C, N)),
|
|
new Z80OpCode("sub a, d", 0x92, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Sub(d.Cpu.Registers.A, d.Cpu.Registers.D, Z | H | C, N)),
|
|
new Z80OpCode("sub a, e", 0x93, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Sub(d.Cpu.Registers.A, d.Cpu.Registers.E, Z | H | C, N)),
|
|
new Z80OpCode("sub a, h", 0x94, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Sub(d.Cpu.Registers.A, d.Cpu.Registers.H, Z | H | C, N)),
|
|
new Z80OpCode("sub a, l", 0x95, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Sub(d.Cpu.Registers.A, d.Cpu.Registers.L, Z | H | C, N)),
|
|
new Z80OpCode("sub a, (hl)", 0x96, 0x00, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Sub(d.Cpu.Registers.A, d.Memory.ReadByte(d.Cpu.Registers.HL), Z | H | C, N)),
|
|
new Z80OpCode("sub a, a", 0x97, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Sub(d.Cpu.Registers.A, d.Cpu.Registers.A, Z | H | C, N)),
|
|
new Z80OpCode("sbc a, b", 0x98, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Sbc(d.Cpu.Registers.A, d.Cpu.Registers.B, Z | H | C, N)),
|
|
new Z80OpCode("sbc a, c", 0x99, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Sbc(d.Cpu.Registers.A, d.Cpu.Registers.C, Z | H | C, N)),
|
|
new Z80OpCode("sbc a, d", 0x9A, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Sbc(d.Cpu.Registers.A, d.Cpu.Registers.D, Z | H | C, N)),
|
|
new Z80OpCode("sbc a, e", 0x9B, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Sbc(d.Cpu.Registers.A, d.Cpu.Registers.E, Z | H | C, N)),
|
|
new Z80OpCode("sbc a, h", 0x9C, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Sbc(d.Cpu.Registers.A, d.Cpu.Registers.H, Z | H | C, N)),
|
|
new Z80OpCode("sbc a, l", 0x9D, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Sbc(d.Cpu.Registers.A, d.Cpu.Registers.L, Z | H | C, N)),
|
|
new Z80OpCode("sbc a, (hl)", 0x9E, 0x00, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Sbc(d.Cpu.Registers.A, d.Memory.ReadByte(d.Cpu.Registers.HL), Z | H | C, N)),
|
|
new Z80OpCode("sbc a, a", 0x9F, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Sbc(d.Cpu.Registers.A, d.Cpu.Registers.A, Z | H | C, N)),
|
|
|
|
// 0xA0 .. 0xAF
|
|
new Z80OpCode("and b", 0xA0, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.And(d.Cpu.Registers.B)),
|
|
new Z80OpCode("and c", 0xA1, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.And(d.Cpu.Registers.C)),
|
|
new Z80OpCode("and d", 0xA2, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.And(d.Cpu.Registers.D)),
|
|
new Z80OpCode("and e", 0xA3, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.And(d.Cpu.Registers.E)),
|
|
new Z80OpCode("and h", 0xA4, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.And(d.Cpu.Registers.H)),
|
|
new Z80OpCode("and l", 0xA5, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.And(d.Cpu.Registers.L)),
|
|
new Z80OpCode("and (hl)", 0xA6, 0x00, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.And(d.Memory.ReadByte(d.Cpu.Registers.HL))),
|
|
new Z80OpCode("and a", 0xA7, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.And(d.Cpu.Registers.A)),
|
|
new Z80OpCode("xor b", 0xA8, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Xor(d.Cpu.Registers.B)),
|
|
new Z80OpCode("xor c", 0xA9, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Xor(d.Cpu.Registers.C)),
|
|
new Z80OpCode("xor d", 0xAA, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Xor(d.Cpu.Registers.D)),
|
|
new Z80OpCode("xor e", 0xAB, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Xor(d.Cpu.Registers.E)),
|
|
new Z80OpCode("xor h", 0xAC, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Xor(d.Cpu.Registers.H)),
|
|
new Z80OpCode("xor l", 0xAD, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Xor(d.Cpu.Registers.L)),
|
|
new Z80OpCode("xor (hl)", 0xAE, 0x00, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Xor(d.Memory.ReadByte(d.Cpu.Registers.HL))),
|
|
new Z80OpCode("xor a", 0xAF, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Xor(d.Cpu.Registers.A)),
|
|
|
|
// 0xB0 .. 0xBF
|
|
new Z80OpCode("or b", 0xB0, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Or(d.Cpu.Registers.B)),
|
|
new Z80OpCode("or c", 0xB1, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Or(d.Cpu.Registers.C)),
|
|
new Z80OpCode("or d", 0xB2, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Or(d.Cpu.Registers.D)),
|
|
new Z80OpCode("or e", 0xB3, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Or(d.Cpu.Registers.E)),
|
|
new Z80OpCode("or h", 0xB4, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Or(d.Cpu.Registers.H)),
|
|
new Z80OpCode("or l", 0xB5, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Or(d.Cpu.Registers.L)),
|
|
new Z80OpCode("or (hl)", 0xB6, 0x00, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Or(d.Memory.ReadByte(d.Cpu.Registers.HL))),
|
|
new Z80OpCode("or a", 0xB7, 0x00, 0, 4, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Or(d.Cpu.Registers.A)),
|
|
new Z80OpCode("cp b", 0xB8, 0x00, 0, 4, (d, i) => d.Cpu.Alu.Cp(d.Cpu.Registers.B)),
|
|
new Z80OpCode("cp c", 0xB9, 0x00, 0, 4, (d, i) => d.Cpu.Alu.Cp(d.Cpu.Registers.C)),
|
|
new Z80OpCode("cp d", 0xBA, 0x00, 0, 4, (d, i) => d.Cpu.Alu.Cp(d.Cpu.Registers.D)),
|
|
new Z80OpCode("cp e", 0xBB, 0x00, 0, 4, (d, i) => d.Cpu.Alu.Cp(d.Cpu.Registers.E)),
|
|
new Z80OpCode("cp h", 0xBC, 0x00, 0, 4, (d, i) => d.Cpu.Alu.Cp(d.Cpu.Registers.H)),
|
|
new Z80OpCode("cp l", 0xBD, 0x00, 0, 4, (d, i) => d.Cpu.Alu.Cp(d.Cpu.Registers.L)),
|
|
new Z80OpCode("cp (hl)", 0xBE, 0x00, 0, 8, (d, i) => d.Cpu.Alu.Cp(d.Memory.ReadByte(d.Cpu.Registers.HL))),
|
|
new Z80OpCode("cp a", 0xBF, 0x00, 0, 4, (d, i) => d.Cpu.Alu.Cp(d.Cpu.Registers.A)),
|
|
|
|
// 0xC0 .. 0xCF
|
|
new Z80OpCode("ret nz", 0xC0, 0x00, 0, 20, 8, (d, i) => d.Cpu.RetFlag(i.OpCode, !d.Cpu.Registers.GetFlags(Z))),
|
|
new Z80OpCode("pop bc", 0xC1, 0x00, 0, 12, (d, i) => d.Cpu.Registers.BC = d.Cpu.Pop()),
|
|
new Z80OpCode("jp nz, {0:x4}", 0xC2, 0x00, 2, 16, 12, (d, i) => d.Cpu.JumpFlag(i.OpCode, i.Operand16, !d.Cpu.Registers.GetFlags(Z))),
|
|
new Z80OpCode("jp {0:x4}", 0xC3, 0x00, 2, 16, (d, i) => d.Cpu.Jump(i.Operand16)),
|
|
new Z80OpCode("call nz, {0:x4}", 0xC4, 0x00, 2, 24, 12, (d, i) => d.Cpu.CallFlag(i.OpCode, i.Operand16, !d.Cpu.Registers.GetFlags(Z))),
|
|
new Z80OpCode("push bc", 0xC5, 0x00, 0, 16, (d, i) => d.Cpu.Push(d.Cpu.Registers.BC)),
|
|
new Z80OpCode("add a, {0:x2}", 0xC6, 0x00, 1, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Add(d.Cpu.Registers.A, i.Operand8, Z | H | C, None, N)),
|
|
new Z80OpCode("rst 00", 0xC7, 0x00, 0, 16, (d, i) => d.Cpu.Rst(0)),
|
|
new Z80OpCode("ret z", 0xC8, 0x00, 0, 20, 8, (d, i) => d.Cpu.RetFlag(i.OpCode, d.Cpu.Registers.GetFlags(Z))),
|
|
new Z80OpCode("ret", 0xC9, 0x00, 0, 16, (d, i) => d.Cpu.Ret()),
|
|
new Z80OpCode("jp z, {0:x4}", 0xCA, 0x00, 2, 16, 12, (d, i) => d.Cpu.JumpFlag(i.OpCode, i.Operand16, d.Cpu.Registers.GetFlags(Z))),
|
|
new Z80OpCode("<<prefix CB>>", ExtendedTableOpcode, 0x00, 0, 0, Z80OpCode.InvalidOpcode), // not really an opcode on its own.
|
|
new Z80OpCode("call z, {0:x4}", 0xCC, 0x00, 2, 24, 12, (d, i) => d.Cpu.CallFlag(i.OpCode, i.Operand16, d.Cpu.Registers.GetFlags(Z))),
|
|
new Z80OpCode("call {0:x4}", 0xCD, 0x00, 2, 24, (d, i) => d.Cpu.Call(i.Operand16)),
|
|
new Z80OpCode("adc a, {0:x2}", 0xCE, 0x00, 1, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Adc(d.Cpu.Registers.A, i.Operand8, Z | H | C, None, N)),
|
|
new Z80OpCode("rst 08", 0xC7, 0x00, 0, 16, (d, i) => d.Cpu.Rst(Custom1)),
|
|
|
|
// 0xD0 .. 0xDF
|
|
new Z80OpCode("ret nc", 0xD0, 0x00, 0, 20, 8, (d, i) => d.Cpu.RetFlag(i.OpCode, !d.Cpu.Registers.GetFlags(C))),
|
|
new Z80OpCode("pop de", 0xD1, 0x00, 0, 12, (d, i) => d.Cpu.Registers.DE = d.Cpu.Pop()),
|
|
new Z80OpCode("jp nc, {0:x4}", 0xD2, 0x00, 2, 16, 12, (d, i) => d.Cpu.JumpFlag(i.OpCode, i.Operand16, !d.Cpu.Registers.GetFlags(C))),
|
|
new Z80OpCode("0xD3", 0xD3, 0x00, 0, 0, Z80OpCode.InvalidOpcode),
|
|
new Z80OpCode("call nc, {0:x4}", 0xD4, 0x00, 2, 24, 12, (d, i) => d.Cpu.CallFlag(i.OpCode, i.Operand16, !d.Cpu.Registers.GetFlags(C))),
|
|
new Z80OpCode("push de", 0xD5, 0x00, 0, 16, (d, i) => d.Cpu.Push(d.Cpu.Registers.DE)),
|
|
new Z80OpCode("sub {0:x2}", 0xD6, 0x00, 1, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Sub(d.Cpu.Registers.A, i.Operand8, Z | H | C, N)),
|
|
new Z80OpCode("rst 10", 0xD7, 0x00, 0, 16, (d, i) => d.Cpu.Rst(Custom2)),
|
|
new Z80OpCode("ret c", 0xD8, 0x00, 0, 20, 8, (d, i) => d.Cpu.RetFlag(i.OpCode, d.Cpu.Registers.GetFlags(C))),
|
|
new Z80OpCode("reti", 0xD9, 0x00, 0, 16, (d, i) =>
|
|
{
|
|
d.Cpu.Ret();
|
|
d.Cpu.Registers.IME = true;
|
|
}),
|
|
new Z80OpCode("jp c, {0:x4}", 0xDA, 0x00, 2, 16, 12, (d, i) => d.Cpu.JumpFlag(i.OpCode, i.Operand16, d.Cpu.Registers.GetFlags(C))),
|
|
new Z80OpCode("0xDB", 0xDB, 0x00, 0, 0, Z80OpCode.InvalidOpcode),
|
|
new Z80OpCode("call c, {0:x4}", 0xDC, 0x00, 2, 24, 12, (d, i) => d.Cpu.CallFlag(i.OpCode, i.Operand16, d.Cpu.Registers.GetFlags(C))),
|
|
new Z80OpCode("0xDD", 0xDD, 0x00, 0, 0, Z80OpCode.NotSupported),
|
|
new Z80OpCode("sbc a, {0:x2}", 0xDE, 0x00, 1, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Sbc(d.Cpu.Registers.A, i.Operand8, Z | H | C, N)),
|
|
new Z80OpCode("rst 18", 0xD7, 0x00, 0, 16, (d, i) => d.Cpu.Rst(Custom3)),
|
|
|
|
// 0xE0 .. 0xEF
|
|
new Z80OpCode("ldh ({0:x2}), a", 0xE0, 0x00, 1, 12, (d, i) => d.Memory.WriteByte((ushort)(0xFF00 + i.Operand8), d.Cpu.Registers.A)),
|
|
new Z80OpCode("pop hl", 0xE1, 0x00, 0, 12, (d, i) => d.Cpu.Registers.HL = d.Cpu.Pop()),
|
|
new Z80OpCode("ldh (c), a", 0xE2, 0x00, 0, 8, (d, i) => d.Memory.WriteByte((ushort)(0xFF00 + d.Cpu.Registers.C), d.Cpu.Registers.A)),
|
|
new Z80OpCode("0xE3", 0xE3, 0x00, 0, 0, Z80OpCode.InvalidOpcode),
|
|
new Z80OpCode("0xE4", 0xE4, 0x00, 0, 0, Z80OpCode.InvalidOpcode),
|
|
new Z80OpCode("push hl", 0xE5, 0x00, 0, 16, (d, i) => d.Cpu.Push(d.Cpu.Registers.HL)),
|
|
new Z80OpCode("and {0:x2}", 0xE6, 0x00, 1, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.And(i.Operand8)),
|
|
new Z80OpCode("rst 20", 0xE7, 0x00, 0, 16, (d, i) => d.Cpu.Rst(Custom4)),
|
|
new Z80OpCode("add sp, {0:x2}", 0xE8, 0x00, 1, 16, (d, i) =>
|
|
{
|
|
d.Cpu.Registers.SP = d.Cpu.Alu.Add(d.Cpu.Registers.SP, unchecked((sbyte)i.Operand8), H | C, None, Z | N);
|
|
}),
|
|
new Z80OpCode("jp (hl)", 0xE9, 0x00, 0, 4, (d, i) => d.Cpu.Jump(d.Cpu.Registers.HL)),
|
|
new Z80OpCode("ld ({0:x4}), a", 0xEA, 0x00, 2, 16, (d, i) => d.Memory.WriteByte(i.Operand16, d.Cpu.Registers.A)),
|
|
new Z80OpCode("0xEB", 0xEB, 0x00, 0, 0, Z80OpCode.InvalidOpcode),
|
|
new Z80OpCode("0xEC", 0xEC, 0x00, 0, 0, Z80OpCode.InvalidOpcode),
|
|
new Z80OpCode("0xED", 0xED, 0x00, 0, 0, Z80OpCode.InvalidOpcode),
|
|
new Z80OpCode("xor {0:x2}", 0xEE, 0x00, 1, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Xor(i.Operand8)),
|
|
new Z80OpCode("rst 28", 0xE7, 0x00, 0, 16, (d, i) => d.Cpu.Rst(Custom5)),
|
|
|
|
// 0xF0 .. 0xFF
|
|
new Z80OpCode("ldh a, ({0:x2})", 0xF0, 0x00, 1, 12, (d, i) => d.Cpu.Registers.A = d.Memory.ReadByte((ushort)(0xFF00 + i.Operand8))),
|
|
new Z80OpCode("pop af", 0xF1, 0x00, 0, 12, (d, i) => d.Cpu.Registers.AF = d.Cpu.Pop()),
|
|
new Z80OpCode("ldh a, (c)", 0xF2, 0x00, 0, 8, (d, i) => d.Cpu.Registers.A = d.Memory.ReadByte((ushort)(0xFF00 + d.Cpu.Registers.C))),
|
|
new Z80OpCode("di", 0xF3, 0x00, 0, 4, (d, i) =>
|
|
{
|
|
d.Cpu.Registers.IME = false;
|
|
d.Cpu.Registers.IMESet = true;
|
|
}),
|
|
new Z80OpCode("0xF4", 0xF4, 0x00, 0, 0, Z80OpCode.InvalidOpcode),
|
|
new Z80OpCode("push af", 0xF5, 0x00, 0, 16, (d, i) => d.Cpu.Push(d.Cpu.Registers.AF)),
|
|
new Z80OpCode("or {0:x2}", 0xF6, 0x00, 1, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Or(i.Operand8)),
|
|
new Z80OpCode("rst 30", 0xF7, 0x00, 0, 16, (d, i) => d.Cpu.Rst(Custom6)),
|
|
new Z80OpCode("ld hl, sp+{0:x2}", 0xF8, 0x00, 1, 12, (d, i) => d.Cpu.Registers.HL = d.Cpu.Alu.Add(d.Cpu.Registers.SP, unchecked((sbyte)i.Operand8), H | C, None, Z | N)),
|
|
new Z80OpCode("ld sp, hl", 0xF9, 0x00, 0, 8, (d, i) => d.Cpu.Registers.SP = d.Cpu.Registers.HL),
|
|
new Z80OpCode("ld a, ({0:x4})", 0xFA, 0x00, 2, 16, (d, i) => d.Cpu.Registers.A = d.Memory.ReadByte(i.Operand16)),
|
|
new Z80OpCode("ei", 0xFB, 0x00, 0, 4, (d, i) =>
|
|
{
|
|
d.Cpu.Registers.IME = true;
|
|
d.Cpu.Registers.IMESet = true;
|
|
}),
|
|
new Z80OpCode("0xFC", 0xFC, 0x00, 0, 0, Z80OpCode.InvalidOpcode),
|
|
new Z80OpCode("0xFD", 0xFD, 0x00, 0, 0, Z80OpCode.InvalidOpcode),
|
|
new Z80OpCode("cp {0:x2}", 0xFE, 0x00, 1, 8, (d, i) => d.Cpu.Alu.Cp(i.Operand8)),
|
|
new Z80OpCode("rst 38", 0xF7, 0x00, 0, 16, (d, i) => d.Cpu.Rst(Custom7)),
|
|
};
|
|
|
|
public static readonly Z80OpCode[] PrefixedOpCodes =
|
|
{
|
|
// 0x00 .. 0x0F
|
|
new Z80OpCode("rlc b", ExtendedTableOpcode, 0x00, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Rlc(d.Cpu.Registers.B, Z | C, None, N | H)),
|
|
new Z80OpCode("rlc c", ExtendedTableOpcode, 0x01, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Rlc(d.Cpu.Registers.C, Z | C, None, N | H)),
|
|
new Z80OpCode("rlc d", ExtendedTableOpcode, 0x02, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Rlc(d.Cpu.Registers.D, Z | C, None, N | H)),
|
|
new Z80OpCode("rlc e", ExtendedTableOpcode, 0x03, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Rlc(d.Cpu.Registers.E, Z | C, None, N | H)),
|
|
new Z80OpCode("rlc h", ExtendedTableOpcode, 0x04, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Rlc(d.Cpu.Registers.H, Z | C, None, N | H)),
|
|
new Z80OpCode("rlc l", ExtendedTableOpcode, 0x05, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Rlc(d.Cpu.Registers.L, Z | C, None, N | H)),
|
|
new Z80OpCode("rlc (hl)", ExtendedTableOpcode, 0x06, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Rlc(d.Memory.ReadByte(d.Cpu.Registers.HL), Z | C, None, N | H))),
|
|
new Z80OpCode("rlc a", ExtendedTableOpcode, 0x07, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Rlc(d.Cpu.Registers.A, Z | C, None, N | H)),
|
|
new Z80OpCode("rrc b", ExtendedTableOpcode, 0x08, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Rrc(d.Cpu.Registers.B, Z | C, None, N | H)),
|
|
new Z80OpCode("rrc c", ExtendedTableOpcode, 0x09, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Rrc(d.Cpu.Registers.C, Z | C, None, N | H)),
|
|
new Z80OpCode("rrc d", ExtendedTableOpcode, 0x0A, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Rrc(d.Cpu.Registers.D, Z | C, None, N | H)),
|
|
new Z80OpCode("rrc e", ExtendedTableOpcode, 0x0B, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Rrc(d.Cpu.Registers.E, Z | C, None, N | H)),
|
|
new Z80OpCode("rrc h", ExtendedTableOpcode, 0x0C, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Rrc(d.Cpu.Registers.H, Z | C, None, N | H)),
|
|
new Z80OpCode("rrc l", ExtendedTableOpcode, 0x0D, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Rrc(d.Cpu.Registers.L, Z | C, None, N | H)),
|
|
new Z80OpCode("rrc (hl)", ExtendedTableOpcode, 0x0E, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Rrc(d.Memory.ReadByte(d.Cpu.Registers.HL), Z | C, None, N | H))),
|
|
new Z80OpCode("rrc a", ExtendedTableOpcode, 0x0F, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Rrc(d.Cpu.Registers.A, Z | C, None, N | H)),
|
|
|
|
// 0x10 .. 0x1F
|
|
new Z80OpCode("rl b", ExtendedTableOpcode, 0x10, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Rl(d.Cpu.Registers.B, Z | C, None, N | H)),
|
|
new Z80OpCode("rl c", ExtendedTableOpcode, 0x11, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Rl(d.Cpu.Registers.C, Z | C, None, N | H)),
|
|
new Z80OpCode("rl d", ExtendedTableOpcode, 0x12, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Rl(d.Cpu.Registers.D, Z | C, None, N | H)),
|
|
new Z80OpCode("rl e", ExtendedTableOpcode, 0x13, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Rl(d.Cpu.Registers.E, Z | C, None, N | H)),
|
|
new Z80OpCode("rl h", ExtendedTableOpcode, 0x14, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Rl(d.Cpu.Registers.H, Z | C, None, N | H)),
|
|
new Z80OpCode("rl l", ExtendedTableOpcode, 0x15, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Rl(d.Cpu.Registers.L, Z | C, None, N | H)),
|
|
new Z80OpCode("rl (hl)", ExtendedTableOpcode, 0x16, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Rl(d.Memory.ReadByte(d.Cpu.Registers.HL), Z | C, None, N | H))),
|
|
new Z80OpCode("rl a", ExtendedTableOpcode, 0x17, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Rl(d.Cpu.Registers.A, Z | C, None, N | H)),
|
|
new Z80OpCode("rr b", ExtendedTableOpcode, 0x18, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Rr(d.Cpu.Registers.B, Z | C, None, N | H)),
|
|
new Z80OpCode("rr c", ExtendedTableOpcode, 0x19, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Rr(d.Cpu.Registers.C, Z | C, None, N | H)),
|
|
new Z80OpCode("rr d", ExtendedTableOpcode, 0x1A, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Rr(d.Cpu.Registers.D, Z | C, None, N | H)),
|
|
new Z80OpCode("rr e", ExtendedTableOpcode, 0x1B, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Rr(d.Cpu.Registers.E, Z | C, None, N | H)),
|
|
new Z80OpCode("rr h", ExtendedTableOpcode, 0x1C, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Rr(d.Cpu.Registers.H, Z | C, None, N | H)),
|
|
new Z80OpCode("rr l", ExtendedTableOpcode, 0x1D, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Rr(d.Cpu.Registers.L, Z | C, None, N | H)),
|
|
new Z80OpCode("rr (hl)", ExtendedTableOpcode, 0x1E, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Rr(d.Memory.ReadByte(d.Cpu.Registers.HL), Z | C, None, N | H))),
|
|
new Z80OpCode("rr a", ExtendedTableOpcode, 0x1F, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Rr(d.Cpu.Registers.A, Z | C, None, N | H)),
|
|
|
|
// 0x20 .. 0x2F
|
|
new Z80OpCode("sla b", ExtendedTableOpcode, 0x20, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Sla(d.Cpu.Registers.B)),
|
|
new Z80OpCode("sla c", ExtendedTableOpcode, 0x21, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Sla(d.Cpu.Registers.C)),
|
|
new Z80OpCode("sla d", ExtendedTableOpcode, 0x22, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Sla(d.Cpu.Registers.D)),
|
|
new Z80OpCode("sla e", ExtendedTableOpcode, 0x23, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Sla(d.Cpu.Registers.E)),
|
|
new Z80OpCode("sla h", ExtendedTableOpcode, 0x24, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Sla(d.Cpu.Registers.H)),
|
|
new Z80OpCode("sla l", ExtendedTableOpcode, 0x25, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Sla(d.Cpu.Registers.L)),
|
|
new Z80OpCode("sla (hl)", ExtendedTableOpcode, 0x26, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Sla(d.Memory.ReadByte(d.Cpu.Registers.HL)))),
|
|
new Z80OpCode("sla a", ExtendedTableOpcode, 0x27, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Sla(d.Cpu.Registers.A)),
|
|
new Z80OpCode("sra b", ExtendedTableOpcode, 0x28, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Sr(d.Cpu.Registers.B, false)),
|
|
new Z80OpCode("sra c", ExtendedTableOpcode, 0x29, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Sr(d.Cpu.Registers.C, false)),
|
|
new Z80OpCode("sra d", ExtendedTableOpcode, 0x2A, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Sr(d.Cpu.Registers.D, false)),
|
|
new Z80OpCode("sra e", ExtendedTableOpcode, 0x2B, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Sr(d.Cpu.Registers.E, false)),
|
|
new Z80OpCode("sra h", ExtendedTableOpcode, 0x2C, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Sr(d.Cpu.Registers.H, false)),
|
|
new Z80OpCode("sra l", ExtendedTableOpcode, 0x2D, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Sr(d.Cpu.Registers.L, false)),
|
|
new Z80OpCode("sra (hl)", ExtendedTableOpcode, 0x2E, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Sr(d.Memory.ReadByte(d.Cpu.Registers.HL), false))),
|
|
new Z80OpCode("sra a", ExtendedTableOpcode, 0x2F, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Sr(d.Cpu.Registers.A, false)),
|
|
|
|
// 0x30 .. 0x3F
|
|
new Z80OpCode("swap b", ExtendedTableOpcode, 0x30, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Swap(d.Cpu.Registers.B)),
|
|
new Z80OpCode("swap c", ExtendedTableOpcode, 0x31, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Swap(d.Cpu.Registers.C)),
|
|
new Z80OpCode("swap d", ExtendedTableOpcode, 0x32, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Swap(d.Cpu.Registers.D)),
|
|
new Z80OpCode("swap e", ExtendedTableOpcode, 0x33, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Swap(d.Cpu.Registers.E)),
|
|
new Z80OpCode("swap h", ExtendedTableOpcode, 0x34, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Swap(d.Cpu.Registers.H)),
|
|
new Z80OpCode("swap l", ExtendedTableOpcode, 0x35, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Swap(d.Cpu.Registers.L)),
|
|
new Z80OpCode("swap (hl)", ExtendedTableOpcode, 0x36, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Swap(d.Memory.ReadByte(d.Cpu.Registers.HL)))),
|
|
new Z80OpCode("swap a", ExtendedTableOpcode, 0x37, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Swap(d.Cpu.Registers.A)),
|
|
new Z80OpCode("srl b", ExtendedTableOpcode, 0x38, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Sr(d.Cpu.Registers.B, true)),
|
|
new Z80OpCode("srl c", ExtendedTableOpcode, 0x39, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Sr(d.Cpu.Registers.C, true)),
|
|
new Z80OpCode("srl d", ExtendedTableOpcode, 0x3A, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Sr(d.Cpu.Registers.D, true)),
|
|
new Z80OpCode("srl e", ExtendedTableOpcode, 0x3B, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Sr(d.Cpu.Registers.E, true)),
|
|
new Z80OpCode("srl h", ExtendedTableOpcode, 0x3C, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Sr(d.Cpu.Registers.H, true)),
|
|
new Z80OpCode("srl l", ExtendedTableOpcode, 0x3D, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Sr(d.Cpu.Registers.L, true)),
|
|
new Z80OpCode("srl (hl)", ExtendedTableOpcode, 0x3E, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Sr(d.Memory.ReadByte(d.Cpu.Registers.HL), true))),
|
|
new Z80OpCode("srl a", ExtendedTableOpcode, 0x3F, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Sr(d.Cpu.Registers.A, true)),
|
|
|
|
// 0x40 .. 0x4F
|
|
new Z80OpCode("bit 0, b", ExtendedTableOpcode, 0x40, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.B, 0)),
|
|
new Z80OpCode("bit 0, c", ExtendedTableOpcode, 0x41, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.C, 0)),
|
|
new Z80OpCode("bit 0, d", ExtendedTableOpcode, 0x42, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.D, 0)),
|
|
new Z80OpCode("bit 0, e", ExtendedTableOpcode, 0x43, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.E, 0)),
|
|
new Z80OpCode("bit 0, h", ExtendedTableOpcode, 0x44, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.H, 0)),
|
|
new Z80OpCode("bit 0, l", ExtendedTableOpcode, 0x45, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.L, 0)),
|
|
new Z80OpCode("bit 0, (hl)", ExtendedTableOpcode, 0x46, 0, 12, (d, i) => d.Cpu.Alu.Bit(d.Memory.ReadByte(d.Cpu.Registers.HL), 0)),
|
|
new Z80OpCode("bit 0, a", ExtendedTableOpcode, 0x47, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.A, 0)),
|
|
new Z80OpCode("bit 1, b", ExtendedTableOpcode, 0x48, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.B, 1)),
|
|
new Z80OpCode("bit 1, c", ExtendedTableOpcode, 0x49, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.C, 1)),
|
|
new Z80OpCode("bit 1, d", ExtendedTableOpcode, 0x4A, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.D, 1)),
|
|
new Z80OpCode("bit 1, e", ExtendedTableOpcode, 0x4B, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.E, 1)),
|
|
new Z80OpCode("bit 1, h", ExtendedTableOpcode, 0x4C, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.H, 1)),
|
|
new Z80OpCode("bit 1, l", ExtendedTableOpcode, 0x4D, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.L, 1)),
|
|
new Z80OpCode("bit 1, (hl)", ExtendedTableOpcode, 0x4E, 0, 12, (d, i) => d.Cpu.Alu.Bit(d.Memory.ReadByte(d.Cpu.Registers.HL), 1)),
|
|
new Z80OpCode("bit 1, a", ExtendedTableOpcode, 0x4F, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.A, 1)),
|
|
|
|
// 0x50 .. 0x5F
|
|
new Z80OpCode("bit 2, b", ExtendedTableOpcode, 0x50, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.B, 2)),
|
|
new Z80OpCode("bit 2, c", ExtendedTableOpcode, 0x51, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.C, 2)),
|
|
new Z80OpCode("bit 2, d", ExtendedTableOpcode, 0x52, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.D, 2)),
|
|
new Z80OpCode("bit 2, e", ExtendedTableOpcode, 0x53, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.E, 2)),
|
|
new Z80OpCode("bit 2, h", ExtendedTableOpcode, 0x54, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.H, 2)),
|
|
new Z80OpCode("bit 2, l", ExtendedTableOpcode, 0x55, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.L, 2)),
|
|
new Z80OpCode("bit 2, (hl)", ExtendedTableOpcode, 0x56, 0, 12, (d, i) => d.Cpu.Alu.Bit(d.Memory.ReadByte(d.Cpu.Registers.HL), 2)),
|
|
new Z80OpCode("bit 2, a", ExtendedTableOpcode, 0x57, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.A, 2)),
|
|
new Z80OpCode("bit 3, b", ExtendedTableOpcode, 0x58, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.B, 3)),
|
|
new Z80OpCode("bit 3, c", ExtendedTableOpcode, 0x59, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.C, 3)),
|
|
new Z80OpCode("bit 3, d", ExtendedTableOpcode, 0x5A, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.D, 3)),
|
|
new Z80OpCode("bit 3, e", ExtendedTableOpcode, 0x5B, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.E, 3)),
|
|
new Z80OpCode("bit 3, h", ExtendedTableOpcode, 0x5C, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.H, 3)),
|
|
new Z80OpCode("bit 3, l", ExtendedTableOpcode, 0x5D, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.L, 3)),
|
|
new Z80OpCode("bit 3, (hl)", ExtendedTableOpcode, 0x5E, 0, 12, (d, i) => d.Cpu.Alu.Bit(d.Memory.ReadByte(d.Cpu.Registers.HL), 3)),
|
|
new Z80OpCode("bit 3, a", ExtendedTableOpcode, 0x5F, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.A, 3)),
|
|
|
|
// 0x60 .. 0x6F
|
|
new Z80OpCode("bit 4, b", ExtendedTableOpcode, 0x60, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.B, 4)),
|
|
new Z80OpCode("bit 4, c", ExtendedTableOpcode, 0x61, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.C, 4)),
|
|
new Z80OpCode("bit 4, d", ExtendedTableOpcode, 0x62, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.D, 4)),
|
|
new Z80OpCode("bit 4, e", ExtendedTableOpcode, 0x63, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.E, 4)),
|
|
new Z80OpCode("bit 4, h", ExtendedTableOpcode, 0x64, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.H, 4)),
|
|
new Z80OpCode("bit 4, l", ExtendedTableOpcode, 0x65, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.L, 4)),
|
|
new Z80OpCode("bit 4, (hl)", ExtendedTableOpcode, 0x66, 0, 12, (d, i) => d.Cpu.Alu.Bit(d.Memory.ReadByte(d.Cpu.Registers.HL), 4)),
|
|
new Z80OpCode("bit 4, a", ExtendedTableOpcode, 0x67, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.A, 4)),
|
|
new Z80OpCode("bit 5, b", ExtendedTableOpcode, 0x68, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.B, 5)),
|
|
new Z80OpCode("bit 5, c", ExtendedTableOpcode, 0x69, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.C, 5)),
|
|
new Z80OpCode("bit 5, d", ExtendedTableOpcode, 0x6A, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.D, 5)),
|
|
new Z80OpCode("bit 5, e", ExtendedTableOpcode, 0x6B, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.E, 5)),
|
|
new Z80OpCode("bit 5, h", ExtendedTableOpcode, 0x6C, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.H, 5)),
|
|
new Z80OpCode("bit 5, l", ExtendedTableOpcode, 0x6D, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.L, 5)),
|
|
new Z80OpCode("bit 5, (hl)", ExtendedTableOpcode, 0x6E, 0, 12, (d, i) => d.Cpu.Alu.Bit(d.Memory.ReadByte(d.Cpu.Registers.HL), 5)),
|
|
new Z80OpCode("bit 5, a", ExtendedTableOpcode, 0x6F, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.A, 5)),
|
|
|
|
// 0x70 .. 0x7F
|
|
new Z80OpCode("bit 6, b", ExtendedTableOpcode, 0x70, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.B, 6)),
|
|
new Z80OpCode("bit 6, c", ExtendedTableOpcode, 0x71, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.C, 6)),
|
|
new Z80OpCode("bit 6, d", ExtendedTableOpcode, 0x72, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.D, 6)),
|
|
new Z80OpCode("bit 6, e", ExtendedTableOpcode, 0x73, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.E, 6)),
|
|
new Z80OpCode("bit 6, h", ExtendedTableOpcode, 0x74, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.H, 6)),
|
|
new Z80OpCode("bit 6, l", ExtendedTableOpcode, 0x75, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.L, 6)),
|
|
new Z80OpCode("bit 6, (hl)", ExtendedTableOpcode, 0x76, 0, 12, (d, i) => d.Cpu.Alu.Bit(d.Memory.ReadByte(d.Cpu.Registers.HL), 6)),
|
|
new Z80OpCode("bit 6, a", ExtendedTableOpcode, 0x77, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.A, 6)),
|
|
new Z80OpCode("bit 7, b", ExtendedTableOpcode, 0x78, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.B, 7)),
|
|
new Z80OpCode("bit 7, c", ExtendedTableOpcode, 0x79, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.C, 7)),
|
|
new Z80OpCode("bit 7, d", ExtendedTableOpcode, 0x7A, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.D, 7)),
|
|
new Z80OpCode("bit 7, e", ExtendedTableOpcode, 0x7B, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.E, 7)),
|
|
new Z80OpCode("bit 7, h", ExtendedTableOpcode, 0x7C, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.H, 7)),
|
|
new Z80OpCode("bit 7, l", ExtendedTableOpcode, 0x7D, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.L, 7)),
|
|
new Z80OpCode("bit 7, (hl)", ExtendedTableOpcode, 0x7E, 0, 12, (d, i) => d.Cpu.Alu.Bit(d.Memory.ReadByte(d.Cpu.Registers.HL), 7)),
|
|
new Z80OpCode("bit 7, a", ExtendedTableOpcode, 0x7F, 0, 8, (d, i) => d.Cpu.Alu.Bit(d.Cpu.Registers.A, 7)),
|
|
|
|
// 0x80 .. 0x8F
|
|
new Z80OpCode("res 0, b", ExtendedTableOpcode, 0x80, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Res(d.Cpu.Registers.B, 0)),
|
|
new Z80OpCode("res 0, c", ExtendedTableOpcode, 0x81, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Res(d.Cpu.Registers.C, 0)),
|
|
new Z80OpCode("res 0, d", ExtendedTableOpcode, 0x82, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Res(d.Cpu.Registers.D, 0)),
|
|
new Z80OpCode("res 0, e", ExtendedTableOpcode, 0x83, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Res(d.Cpu.Registers.E, 0)),
|
|
new Z80OpCode("res 0, h", ExtendedTableOpcode, 0x84, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Res(d.Cpu.Registers.H, 0)),
|
|
new Z80OpCode("res 0, l", ExtendedTableOpcode, 0x85, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Res(d.Cpu.Registers.L, 0)),
|
|
new Z80OpCode("res 0, (hl)", ExtendedTableOpcode, 0x86, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Res(d.Memory.ReadByte(d.Cpu.Registers.HL), 0))),
|
|
new Z80OpCode("res 0, a", ExtendedTableOpcode, 0x87, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Res(d.Cpu.Registers.A, 0)),
|
|
new Z80OpCode("res 1, b", ExtendedTableOpcode, 0x88, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Res(d.Cpu.Registers.B, 1)),
|
|
new Z80OpCode("res 1, c", ExtendedTableOpcode, 0x89, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Res(d.Cpu.Registers.C, 1)),
|
|
new Z80OpCode("res 1, d", ExtendedTableOpcode, 0x8A, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Res(d.Cpu.Registers.D, 1)),
|
|
new Z80OpCode("res 1, e", ExtendedTableOpcode, 0x8B, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Res(d.Cpu.Registers.E, 1)),
|
|
new Z80OpCode("res 1, h", ExtendedTableOpcode, 0x8C, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Res(d.Cpu.Registers.H, 1)),
|
|
new Z80OpCode("res 1, l", ExtendedTableOpcode, 0x8D, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Res(d.Cpu.Registers.L, 1)),
|
|
new Z80OpCode("res 1, (hl)", ExtendedTableOpcode, 0x8E, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Res(d.Memory.ReadByte(d.Cpu.Registers.HL), 1))),
|
|
new Z80OpCode("res 1, a", ExtendedTableOpcode, 0x8F, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Res(d.Cpu.Registers.A, 1)),
|
|
|
|
// 0x90 .. 0x9F
|
|
new Z80OpCode("res 2, b", ExtendedTableOpcode, 0x90, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Res(d.Cpu.Registers.B, 2)),
|
|
new Z80OpCode("res 2, c", ExtendedTableOpcode, 0x91, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Res(d.Cpu.Registers.C, 2)),
|
|
new Z80OpCode("res 2, d", ExtendedTableOpcode, 0x92, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Res(d.Cpu.Registers.D, 2)),
|
|
new Z80OpCode("res 2, e", ExtendedTableOpcode, 0x93, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Res(d.Cpu.Registers.E, 2)),
|
|
new Z80OpCode("res 2, h", ExtendedTableOpcode, 0x94, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Res(d.Cpu.Registers.H, 2)),
|
|
new Z80OpCode("res 2, l", ExtendedTableOpcode, 0x95, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Res(d.Cpu.Registers.L, 2)),
|
|
new Z80OpCode("res 2, (hl)", ExtendedTableOpcode, 0x96, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Res(d.Memory.ReadByte(d.Cpu.Registers.HL), 2))),
|
|
new Z80OpCode("res 2, a", ExtendedTableOpcode, 0x97, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Res(d.Cpu.Registers.A, 2)),
|
|
new Z80OpCode("res 3, b", ExtendedTableOpcode, 0x98, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Res(d.Cpu.Registers.B, 3)),
|
|
new Z80OpCode("res 3, c", ExtendedTableOpcode, 0x99, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Res(d.Cpu.Registers.C, 3)),
|
|
new Z80OpCode("res 3, d", ExtendedTableOpcode, 0x9A, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Res(d.Cpu.Registers.D, 3)),
|
|
new Z80OpCode("res 3, e", ExtendedTableOpcode, 0x9B, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Res(d.Cpu.Registers.E, 3)),
|
|
new Z80OpCode("res 3, h", ExtendedTableOpcode, 0x9C, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Res(d.Cpu.Registers.H, 3)),
|
|
new Z80OpCode("res 3, l", ExtendedTableOpcode, 0x9D, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Res(d.Cpu.Registers.L, 3)),
|
|
new Z80OpCode("res 3, (hl)", ExtendedTableOpcode, 0x9E, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Res(d.Memory.ReadByte(d.Cpu.Registers.HL), 3))),
|
|
new Z80OpCode("res 3, a", ExtendedTableOpcode, 0x9F, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Res(d.Cpu.Registers.A, 3)),
|
|
|
|
// 0xA0 .. 0xAF
|
|
new Z80OpCode("res 4, b", ExtendedTableOpcode, 0xA0, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Res(d.Cpu.Registers.B, 4)),
|
|
new Z80OpCode("res 4, c", ExtendedTableOpcode, 0xA1, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Res(d.Cpu.Registers.C, 4)),
|
|
new Z80OpCode("res 4, d", ExtendedTableOpcode, 0xA2, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Res(d.Cpu.Registers.D, 4)),
|
|
new Z80OpCode("res 4, e", ExtendedTableOpcode, 0xA3, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Res(d.Cpu.Registers.E, 4)),
|
|
new Z80OpCode("res 4, h", ExtendedTableOpcode, 0xA4, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Res(d.Cpu.Registers.H, 4)),
|
|
new Z80OpCode("res 4, l", ExtendedTableOpcode, 0xA5, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Res(d.Cpu.Registers.L, 4)),
|
|
new Z80OpCode("res 4, (hl)", ExtendedTableOpcode, 0xA6, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Res(d.Memory.ReadByte(d.Cpu.Registers.HL), 4))),
|
|
new Z80OpCode("res 4, a", ExtendedTableOpcode, 0xA7, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Res(d.Cpu.Registers.A, 4)),
|
|
new Z80OpCode("res 5, b", ExtendedTableOpcode, 0xA8, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Res(d.Cpu.Registers.B, 5)),
|
|
new Z80OpCode("res 5, c", ExtendedTableOpcode, 0xA9, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Res(d.Cpu.Registers.C, 5)),
|
|
new Z80OpCode("res 5, d", ExtendedTableOpcode, 0xAA, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Res(d.Cpu.Registers.D, 5)),
|
|
new Z80OpCode("res 5, e", ExtendedTableOpcode, 0xAB, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Res(d.Cpu.Registers.E, 5)),
|
|
new Z80OpCode("res 5, h", ExtendedTableOpcode, 0xAC, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Res(d.Cpu.Registers.H, 5)),
|
|
new Z80OpCode("res 5, l", ExtendedTableOpcode, 0xAD, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Res(d.Cpu.Registers.L, 5)),
|
|
new Z80OpCode("res 5, (hl)", ExtendedTableOpcode, 0xAE, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Res(d.Memory.ReadByte(d.Cpu.Registers.HL), 5))),
|
|
new Z80OpCode("res 5, a", ExtendedTableOpcode, 0xAF, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Res(d.Cpu.Registers.A, 5)),
|
|
|
|
// 0xB0 .. 0xBF
|
|
new Z80OpCode("res 6, b", ExtendedTableOpcode, 0xB0, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Res(d.Cpu.Registers.B, 6)),
|
|
new Z80OpCode("res 6, c", ExtendedTableOpcode, 0xB1, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Res(d.Cpu.Registers.C, 6)),
|
|
new Z80OpCode("res 6, d", ExtendedTableOpcode, 0xB2, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Res(d.Cpu.Registers.D, 6)),
|
|
new Z80OpCode("res 6, e", ExtendedTableOpcode, 0xB3, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Res(d.Cpu.Registers.E, 6)),
|
|
new Z80OpCode("res 6, h", ExtendedTableOpcode, 0xB4, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Res(d.Cpu.Registers.H, 6)),
|
|
new Z80OpCode("res 6, l", ExtendedTableOpcode, 0xB5, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Res(d.Cpu.Registers.L, 6)),
|
|
new Z80OpCode("res 6, (hl)", ExtendedTableOpcode, 0xB6, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Res(d.Memory.ReadByte(d.Cpu.Registers.HL), 6))),
|
|
new Z80OpCode("res 6, a", ExtendedTableOpcode, 0xB7, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Res(d.Cpu.Registers.A, 6)),
|
|
new Z80OpCode("res 7, b", ExtendedTableOpcode, 0xB8, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Res(d.Cpu.Registers.B, 7)),
|
|
new Z80OpCode("res 7, c", ExtendedTableOpcode, 0xB9, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Res(d.Cpu.Registers.C, 7)),
|
|
new Z80OpCode("res 7, d", ExtendedTableOpcode, 0xBA, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Res(d.Cpu.Registers.D, 7)),
|
|
new Z80OpCode("res 7, e", ExtendedTableOpcode, 0xBB, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Res(d.Cpu.Registers.E, 7)),
|
|
new Z80OpCode("res 7, h", ExtendedTableOpcode, 0xBC, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Res(d.Cpu.Registers.H, 7)),
|
|
new Z80OpCode("res 7, l", ExtendedTableOpcode, 0xBD, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Res(d.Cpu.Registers.L, 7)),
|
|
new Z80OpCode("res 7, (hl)", ExtendedTableOpcode, 0xBE, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Res(d.Memory.ReadByte(d.Cpu.Registers.HL), 7))),
|
|
new Z80OpCode("res 7, a", ExtendedTableOpcode, 0xBF, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Res(d.Cpu.Registers.A, 7)),
|
|
|
|
|
|
// 0xC0 .. 0xCF
|
|
new Z80OpCode("set 0, b", ExtendedTableOpcode, 0xC0, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Set(d.Cpu.Registers.B, 0)),
|
|
new Z80OpCode("set 0, c", ExtendedTableOpcode, 0xC1, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Set(d.Cpu.Registers.C, 0)),
|
|
new Z80OpCode("set 0, d", ExtendedTableOpcode, 0xC2, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Set(d.Cpu.Registers.D, 0)),
|
|
new Z80OpCode("set 0, e", ExtendedTableOpcode, 0xC3, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Set(d.Cpu.Registers.E, 0)),
|
|
new Z80OpCode("set 0, h", ExtendedTableOpcode, 0xC4, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Set(d.Cpu.Registers.H, 0)),
|
|
new Z80OpCode("set 0, l", ExtendedTableOpcode, 0xC5, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Set(d.Cpu.Registers.L, 0)),
|
|
new Z80OpCode("set 0, (hl)", ExtendedTableOpcode, 0xC6, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Set(d.Memory.ReadByte(d.Cpu.Registers.HL), 0))),
|
|
new Z80OpCode("set 0, a", ExtendedTableOpcode, 0xC7, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Set(d.Cpu.Registers.A, 0)),
|
|
new Z80OpCode("set 1, b", ExtendedTableOpcode, 0xC8, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Set(d.Cpu.Registers.B, 1)),
|
|
new Z80OpCode("set 1, c", ExtendedTableOpcode, 0xC9, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Set(d.Cpu.Registers.C, 1)),
|
|
new Z80OpCode("set 1, d", ExtendedTableOpcode, 0xCA, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Set(d.Cpu.Registers.D, 1)),
|
|
new Z80OpCode("set 1, e", ExtendedTableOpcode, ExtendedTableOpcode, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Set(d.Cpu.Registers.E, 1)),
|
|
new Z80OpCode("set 1, h", ExtendedTableOpcode, 0xCC, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Set(d.Cpu.Registers.H, 1)),
|
|
new Z80OpCode("set 1, l", ExtendedTableOpcode, 0xCD, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Set(d.Cpu.Registers.L, 1)),
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new Z80OpCode("set 1, (hl)", ExtendedTableOpcode, 0xCE, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Set(d.Memory.ReadByte(d.Cpu.Registers.HL), 1))),
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new Z80OpCode("set 1, a", ExtendedTableOpcode, 0xCF, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Set(d.Cpu.Registers.A, 1)),
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// 0xD0 .. 0xDF
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new Z80OpCode("set 2, b", ExtendedTableOpcode, 0xD0, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Set(d.Cpu.Registers.B, 2)),
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new Z80OpCode("set 2, c", ExtendedTableOpcode, 0xD1, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Set(d.Cpu.Registers.C, 2)),
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new Z80OpCode("set 2, d", ExtendedTableOpcode, 0xD2, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Set(d.Cpu.Registers.D, 2)),
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new Z80OpCode("set 2, e", ExtendedTableOpcode, 0xD3, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Set(d.Cpu.Registers.E, 2)),
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new Z80OpCode("set 2, h", ExtendedTableOpcode, 0xD4, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Set(d.Cpu.Registers.H, 2)),
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new Z80OpCode("set 2, l", ExtendedTableOpcode, 0xD5, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Set(d.Cpu.Registers.L, 2)),
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new Z80OpCode("set 2, (hl)", ExtendedTableOpcode, 0xD6, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Set(d.Memory.ReadByte(d.Cpu.Registers.HL), 2))),
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new Z80OpCode("set 2, a", ExtendedTableOpcode, 0xD7, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Set(d.Cpu.Registers.A, 2)),
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new Z80OpCode("set 3, b", ExtendedTableOpcode, 0xD8, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Set(d.Cpu.Registers.B, 3)),
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new Z80OpCode("set 3, c", ExtendedTableOpcode, 0xD9, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Set(d.Cpu.Registers.C, 3)),
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new Z80OpCode("set 3, d", ExtendedTableOpcode, 0xDA, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Set(d.Cpu.Registers.D, 3)),
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new Z80OpCode("set 3, e", ExtendedTableOpcode, 0xDB, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Set(d.Cpu.Registers.E, 3)),
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new Z80OpCode("set 3, h", ExtendedTableOpcode, 0xDC, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Set(d.Cpu.Registers.H, 3)),
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new Z80OpCode("set 3, l", ExtendedTableOpcode, 0xDD, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Set(d.Cpu.Registers.L, 3)),
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new Z80OpCode("set 3, (hl)", ExtendedTableOpcode, 0xDE, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Set(d.Memory.ReadByte(d.Cpu.Registers.HL), 3))),
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new Z80OpCode("set 3, a", ExtendedTableOpcode, 0xDF, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Set(d.Cpu.Registers.A, 3)),
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// 0xE0 .. 0xEF
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new Z80OpCode("set 4, b", ExtendedTableOpcode, 0xE0, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Set(d.Cpu.Registers.B, 4)),
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new Z80OpCode("set 4, c", ExtendedTableOpcode, 0xE1, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Set(d.Cpu.Registers.C, 4)),
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new Z80OpCode("set 4, d", ExtendedTableOpcode, 0xE2, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Set(d.Cpu.Registers.D, 4)),
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new Z80OpCode("set 4, e", ExtendedTableOpcode, 0xE3, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Set(d.Cpu.Registers.E, 4)),
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new Z80OpCode("set 4, h", ExtendedTableOpcode, 0xE4, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Set(d.Cpu.Registers.H, 4)),
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new Z80OpCode("set 4, l", ExtendedTableOpcode, 0xE5, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Set(d.Cpu.Registers.L, 4)),
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new Z80OpCode("set 4, (hl)", ExtendedTableOpcode, 0xE6, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Set(d.Memory.ReadByte(d.Cpu.Registers.HL), 4))),
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new Z80OpCode("set 4, a", ExtendedTableOpcode, 0xE7, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Set(d.Cpu.Registers.A, 4)),
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new Z80OpCode("set 5, b", ExtendedTableOpcode, 0xE8, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Set(d.Cpu.Registers.B, 5)),
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new Z80OpCode("set 5, c", ExtendedTableOpcode, 0xE9, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Set(d.Cpu.Registers.C, 5)),
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new Z80OpCode("set 5, d", ExtendedTableOpcode, 0xEA, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Set(d.Cpu.Registers.D, 5)),
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new Z80OpCode("set 5, e", ExtendedTableOpcode, 0xEB, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Set(d.Cpu.Registers.E, 5)),
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new Z80OpCode("set 5, h", ExtendedTableOpcode, 0xEC, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Set(d.Cpu.Registers.H, 5)),
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new Z80OpCode("set 5, l", ExtendedTableOpcode, 0xED, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Set(d.Cpu.Registers.L, 5)),
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new Z80OpCode("set 5, (hl)", ExtendedTableOpcode, 0xEE, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Set(d.Memory.ReadByte(d.Cpu.Registers.HL), 5))),
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new Z80OpCode("set 5, a", ExtendedTableOpcode, 0xEF, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Set(d.Cpu.Registers.A, 5)),
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// 0xF0 .. 0xFF
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new Z80OpCode("set 6, b", ExtendedTableOpcode, 0xF0, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Set(d.Cpu.Registers.B, 6)),
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new Z80OpCode("set 6, c", ExtendedTableOpcode, 0xF1, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Set(d.Cpu.Registers.C, 6)),
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new Z80OpCode("set 6, d", ExtendedTableOpcode, 0xF2, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Set(d.Cpu.Registers.D, 6)),
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new Z80OpCode("set 6, e", ExtendedTableOpcode, 0xF3, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Set(d.Cpu.Registers.E, 6)),
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new Z80OpCode("set 6, h", ExtendedTableOpcode, 0xF4, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Set(d.Cpu.Registers.H, 6)),
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new Z80OpCode("set 6, l", ExtendedTableOpcode, 0xF5, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Set(d.Cpu.Registers.L, 6)),
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new Z80OpCode("set 6, (hl)", ExtendedTableOpcode, 0xF6, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Set(d.Memory.ReadByte(d.Cpu.Registers.HL), 6))),
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new Z80OpCode("set 6, a", ExtendedTableOpcode, 0xF7, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Set(d.Cpu.Registers.A, 6)),
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new Z80OpCode("set 7, b", ExtendedTableOpcode, 0xF8, 0, 8, (d, i) => d.Cpu.Registers.B = d.Cpu.Alu.Set(d.Cpu.Registers.B, 7)),
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new Z80OpCode("set 7, c", ExtendedTableOpcode, 0xF9, 0, 8, (d, i) => d.Cpu.Registers.C = d.Cpu.Alu.Set(d.Cpu.Registers.C, 7)),
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new Z80OpCode("set 7, d", ExtendedTableOpcode, 0xFA, 0, 8, (d, i) => d.Cpu.Registers.D = d.Cpu.Alu.Set(d.Cpu.Registers.D, 7)),
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new Z80OpCode("set 7, e", ExtendedTableOpcode, 0xFB, 0, 8, (d, i) => d.Cpu.Registers.E = d.Cpu.Alu.Set(d.Cpu.Registers.E, 7)),
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new Z80OpCode("set 7, h", ExtendedTableOpcode, 0xFC, 0, 8, (d, i) => d.Cpu.Registers.H = d.Cpu.Alu.Set(d.Cpu.Registers.H, 7)),
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new Z80OpCode("set 7, l", ExtendedTableOpcode, 0xFD, 0, 8, (d, i) => d.Cpu.Registers.L = d.Cpu.Alu.Set(d.Cpu.Registers.L, 7)),
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new Z80OpCode("set 7, (hl)", ExtendedTableOpcode, 0xFE, 0, 16, (d, i) => d.Memory.WriteByte(d.Cpu.Registers.HL, d.Cpu.Alu.Set(d.Memory.ReadByte(d.Cpu.Registers.HL), 7))),
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new Z80OpCode("set 7, a", ExtendedTableOpcode, 0xFF, 0, 8, (d, i) => d.Cpu.Registers.A = d.Cpu.Alu.Set(d.Cpu.Registers.A, 7)),
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};
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}
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}
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