mirror of https://github.com/pret/pokeemerald.git
411 lines
6.4 KiB
ArmAsm
411 lines
6.4 KiB
ArmAsm
thumb_func_start InitGpuRegManager
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; void InitGpuRegManager()
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InitGpuRegManager: ; 8000FE4
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push {r4-r7,lr}
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mov r7, r8
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push {r7}
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movs r2, 0
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ldr r7, =0x030008d8
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ldr r0, =0x030008d9
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mov r12, r0
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ldr r1, =0x030008da
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mov r8, r1
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ldr r6, =0x03000818
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movs r5, 0
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ldr r4, =0x03000878
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movs r3, 0xFF
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@08000FFE:
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adds r0, r2, r6
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strb r5, [r0]
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adds r1, r2, r4
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ldrb r0, [r1]
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orrs r0, r3
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strb r0, [r1]
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adds r2, 0x1
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cmp r2, 0x5F
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ble @08000FFE
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movs r0, 0
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strb r0, [r7]
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mov r1, r12
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strb r0, [r1]
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movs r0, 0
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mov r1, r8
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strh r0, [r1]
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pop {r3}
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mov r8, r3
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pop {r4-r7}
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pop {r0}
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bx r0
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.pool
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thumb_func_end InitGpuRegManager
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thumb_func_start CopyBufferedValueToGpuReg
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; void CopyBufferedValueToGpuReg(u8 reg)
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CopyBufferedValueToGpuReg: ; 800103C
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push {lr}
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lsls r0, 24
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lsrs r2, r0, 24
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cmp r2, 0x4
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bne @08001068
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ldr r2, =0x04000004
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ldrh r1, [r2]
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ldr r0, =0x0000ffe7
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ands r0, r1
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strh r0, [r2]
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ldr r1, =0x0300081c
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ldrh r0, [r2]
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ldrh r1, [r1]
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orrs r0, r1
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strh r0, [r2]
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b @08001076
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.pool
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@08001068:
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movs r0, 0x80
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lsls r0, 19
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adds r0, r2, r0
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ldr r1, =0x03000818
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adds r1, r2, r1
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ldrh r1, [r1]
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strh r1, [r0]
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@08001076:
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pop {r0}
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bx r0
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.pool
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thumb_func_end CopyBufferedValueToGpuReg
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thumb_func_start CopyBufferedValuesToGpuRegs
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; void CopyBufferedValuesToGpuRegs()
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CopyBufferedValuesToGpuRegs: ; 8001080
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push {r4,r5,lr}
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ldr r0, =0x030008d8
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ldrb r0, [r0]
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cmp r0, 0
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bne @080010A4
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movs r5, 0
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@0800108C:
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ldr r0, =0x03000878
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adds r4, r5, r0
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ldrb r0, [r4]
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cmp r0, 0xFF
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beq @080010A4
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bl CopyBufferedValueToGpuReg
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movs r0, 0xFF
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strb r0, [r4]
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adds r5, 0x1
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cmp r5, 0x5F
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ble @0800108C
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@080010A4:
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pop {r4,r5}
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pop {r0}
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bx r0
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.pool
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thumb_func_end CopyBufferedValuesToGpuRegs
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thumb_func_start SetGpuReg
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; void SetGpuReg(u8 reg, u16 value)
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SetGpuReg: ; 80010B4
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push {r4,r5,lr}
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lsls r0, 24
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lsrs r4, r0, 24
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lsls r1, 16
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lsrs r1, 16
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cmp r4, 0x5F
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bhi @08001130
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ldr r0, =0x03000818
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adds r0, r4, r0
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strh r1, [r0]
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ldr r0, =0x04000006
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ldrh r1, [r0]
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movs r0, 0xFF
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ands r0, r1
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subs r0, 0xA1
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lsls r0, 16
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lsrs r0, 16
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cmp r0, 0x40
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bls @080010E8
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movs r0, 0x80
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lsls r0, 19
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ldrh r1, [r0]
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movs r0, 0x80
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ands r0, r1
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cmp r0, 0
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beq @080010FE
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@080010E8:
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adds r0, r4, 0
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bl CopyBufferedValueToGpuReg
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b @08001130
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.pool
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@080010F8:
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movs r0, 0
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strb r0, [r5]
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b @08001130
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@080010FE:
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ldr r2, =0x030008d8
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movs r0, 0x1
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strb r0, [r2]
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movs r3, 0
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ldr r0, =0x03000878
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ldrb r1, [r0]
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adds r5, r2, 0
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adds r2, r0, 0
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cmp r1, 0xFF
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beq @08001128
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adds r1, r2, 0
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@08001114:
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ldrb r0, [r1]
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cmp r0, r4
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beq @080010F8
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adds r1, 0x1
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adds r3, 0x1
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cmp r3, 0x5F
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bgt @08001128
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ldrb r0, [r1]
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cmp r0, 0xFF
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bne @08001114
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@08001128:
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adds r0, r3, r2
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movs r1, 0
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strb r4, [r0]
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strb r1, [r5]
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@08001130:
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pop {r4,r5}
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pop {r0}
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bx r0
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.pool
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thumb_func_end SetGpuReg
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thumb_func_start SetGpuReg_ScreenOff
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; void SetGpuReg_ScreenOff(u8 reg, u16 value)
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SetGpuReg_ScreenOff: ; 8001140
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push {r4,r5,lr}
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lsls r0, 24
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lsrs r4, r0, 24
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lsls r1, 16
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lsrs r1, 16
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cmp r4, 0x5F
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bhi @080011A8
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ldr r0, =0x03000818
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adds r0, r4, r0
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strh r1, [r0]
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movs r0, 0x80
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lsls r0, 19
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ldrh r1, [r0]
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movs r0, 0x80
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ands r0, r1
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cmp r0, 0
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beq @08001176
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adds r0, r4, 0
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bl CopyBufferedValueToGpuReg
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b @080011A8
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.pool
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@08001170:
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movs r0, 0
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strb r0, [r5]
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b @080011A8
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@08001176:
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ldr r2, =0x030008d8
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movs r0, 0x1
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strb r0, [r2]
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movs r3, 0
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ldr r0, =0x03000878
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ldrb r1, [r0]
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adds r5, r2, 0
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adds r2, r0, 0
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cmp r1, 0xFF
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beq @080011A0
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adds r1, r2, 0
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@0800118C:
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ldrb r0, [r1]
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cmp r0, r4
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beq @08001170
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adds r1, 0x1
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adds r3, 0x1
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cmp r3, 0x5F
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bgt @080011A0
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ldrb r0, [r1]
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cmp r0, 0xFF
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bne @0800118C
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@080011A0:
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adds r0, r3, r2
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movs r1, 0
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strb r4, [r0]
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strb r1, [r5]
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@080011A8:
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pop {r4,r5}
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pop {r0}
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bx r0
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.pool
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thumb_func_end SetGpuReg_ScreenOff
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thumb_func_start GetGpuReg
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; u16 GetGpuReg(u8 reg)
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GetGpuReg: ; 80011B8
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push {lr}
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lsls r0, 24
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lsrs r0, 24
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adds r1, r0, 0
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cmp r1, 0x4
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bne @080011CC
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ldr r0, =0x04000004
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b @080011DE
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.pool
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@080011CC:
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cmp r1, 0x6
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beq @080011DC
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ldr r0, =0x03000818
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adds r0, r1, r0
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ldrh r0, [r0]
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b @080011E0
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.pool
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@080011DC:
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ldr r0, =0x04000006
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@080011DE:
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ldrh r0, [r0]
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@080011E0:
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pop {r1}
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bx r1
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.pool
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thumb_func_end GetGpuReg
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thumb_func_start SetGpuRegBits
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; void SetGpuRegBits(u8 reg, u16 mask)
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SetGpuRegBits: ; 80011E8
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push {lr}
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adds r2, r1, 0
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lsls r0, 24
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lsrs r0, 24
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ldr r1, =0x03000818
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adds r1, r0, r1
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ldrh r1, [r1]
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orrs r1, r2
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lsls r1, 16
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lsrs r1, 16
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bl SetGpuReg
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pop {r0}
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bx r0
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.pool
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thumb_func_end SetGpuRegBits
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thumb_func_start ResetGpuRegBits
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; void ResetGpuRegBits(u8 reg, u16 mask)
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ResetGpuRegBits: ; 8001208
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push {lr}
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adds r2, r1, 0
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lsls r0, 24
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lsrs r0, 24
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lsls r2, 16
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ldr r1, =0x03000818
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adds r1, r0, r1
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ldrh r1, [r1]
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lsrs r2, 16
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bics r1, r2
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bl SetGpuReg
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pop {r0}
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bx r0
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.pool
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thumb_func_end ResetGpuRegBits
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thumb_func_start SyncIEReg
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; void SyncIEReg()
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SyncIEReg: ; 8001228
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push {r4,r5,lr}
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ldr r5, =0x030008d9
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ldrb r0, [r5]
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cmp r0, 0
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beq @08001246
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ldr r2, =0x04000208
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ldrh r1, [r2]
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movs r4, 0
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strh r4, [r2]
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ldr r3, =0x04000200
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ldr r0, =0x030008da
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ldrh r0, [r0]
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strh r0, [r3]
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strh r1, [r2]
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strb r4, [r5]
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@08001246:
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pop {r4,r5}
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pop {r0}
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bx r0
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.pool
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thumb_func_end SyncIEReg
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thumb_func_start EnableInterrupts
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; void EnableInterrupts(u16 mask)
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EnableInterrupts: ; 800125C
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push {r4,lr}
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lsls r0, 16
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lsrs r0, 16
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ldr r4, =0x030008da
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ldrh r1, [r4]
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orrs r0, r1
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strh r0, [r4]
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ldr r1, =0x030008d9
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movs r0, 0x1
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strb r0, [r1]
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bl SyncIEReg
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ldrh r0, [r4]
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bl SetDispstatVBlankHBlankInterrupts
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pop {r4}
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pop {r0}
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bx r0
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.pool
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thumb_func_end EnableInterrupts
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thumb_func_start DisableInterrupts
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; void DisableInterrupts(u16 mask)
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DisableInterrupts: ; 8001288
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push {r4,lr}
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lsls r0, 16
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lsrs r0, 16
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ldr r4, =0x030008da
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ldrh r1, [r4]
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bics r1, r0
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strh r1, [r4]
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ldr r1, =0x030008d9
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movs r0, 0x1
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strb r0, [r1]
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bl SyncIEReg
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ldrh r0, [r4]
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bl SetDispstatVBlankHBlankInterrupts
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pop {r4}
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pop {r0}
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bx r0
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.pool
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thumb_func_end DisableInterrupts
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thumb_func_start SetDispstatVBlankHBlankInterrupts
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; void SetDispstatVBlankHBlankInterrupts(u16 mask)
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SetDispstatVBlankHBlankInterrupts: ; 80012B4
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push {r4,lr}
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adds r4, r0, 0
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lsls r4, 16
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lsrs r4, 16
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movs r0, 0x4
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bl GetGpuReg
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movs r2, 0x18
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ands r2, r0
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movs r1, 0x1
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ands r1, r4
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negs r0, r1
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orrs r0, r1
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asrs r1, r0, 31
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movs r0, 0x8
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ands r1, r0
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movs r0, 0x2
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ands r0, r4
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cmp r0, 0
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beq @080012E0
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movs r0, 0x10
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orrs r1, r0
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@080012E0:
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cmp r2, r1
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beq @080012EA
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movs r0, 0x4
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bl SetGpuReg
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@080012EA:
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pop {r4}
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pop {r0}
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bx r0
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thumb_func_end SetDispstatVBlankHBlankInterrupts
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