pokeemerald/asm/gpu_reg_manager.s

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6.4 KiB
ArmAsm
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2015-11-30 07:17:50 +00:00
thumb_func_start InitGpuRegManager
; void InitGpuRegManager()
InitGpuRegManager: ; 8000FE4
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push {r4-r7,lr}
mov r7, r8
push {r7}
movs r2, 0
ldr r7, =0x030008d8
ldr r0, =0x030008d9
mov r12, r0
ldr r1, =0x030008da
mov r8, r1
ldr r6, =0x03000818
movs r5, 0
ldr r4, =0x03000878
movs r3, 0xFF
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@08000FFE:
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adds r0, r2, r6
strb r5, [r0]
adds r1, r2, r4
ldrb r0, [r1]
orrs r0, r3
strb r0, [r1]
adds r2, 0x1
cmp r2, 0x5F
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ble @08000FFE
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movs r0, 0
strb r0, [r7]
mov r1, r12
strb r0, [r1]
movs r0, 0
mov r1, r8
strh r0, [r1]
pop {r3}
mov r8, r3
pop {r4-r7}
pop {r0}
bx r0
.pool
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thumb_func_end InitGpuRegManager
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thumb_func_start CopyBufferedValueToGpuReg
; void CopyBufferedValueToGpuReg(u8 reg)
CopyBufferedValueToGpuReg: ; 800103C
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push {lr}
lsls r0, 24
lsrs r2, r0, 24
cmp r2, 0x4
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bne @08001068
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ldr r2, =0x04000004
ldrh r1, [r2]
ldr r0, =0x0000ffe7
ands r0, r1
strh r0, [r2]
ldr r1, =0x0300081c
ldrh r0, [r2]
ldrh r1, [r1]
orrs r0, r1
strh r0, [r2]
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b @08001076
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.pool
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@08001068:
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movs r0, 0x80
lsls r0, 19
adds r0, r2, r0
ldr r1, =0x03000818
adds r1, r2, r1
ldrh r1, [r1]
strh r1, [r0]
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@08001076:
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pop {r0}
bx r0
.pool
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thumb_func_end CopyBufferedValueToGpuReg
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thumb_func_start CopyBufferedValuesToGpuRegs
; void CopyBufferedValuesToGpuRegs()
CopyBufferedValuesToGpuRegs: ; 8001080
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push {r4,r5,lr}
ldr r0, =0x030008d8
ldrb r0, [r0]
cmp r0, 0
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bne @080010A4
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movs r5, 0
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@0800108C:
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ldr r0, =0x03000878
adds r4, r5, r0
ldrb r0, [r4]
cmp r0, 0xFF
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beq @080010A4
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bl CopyBufferedValueToGpuReg
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movs r0, 0xFF
strb r0, [r4]
adds r5, 0x1
cmp r5, 0x5F
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ble @0800108C
@080010A4:
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pop {r4,r5}
pop {r0}
bx r0
.pool
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thumb_func_end CopyBufferedValuesToGpuRegs
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thumb_func_start SetGpuReg
; void SetGpuReg(u8 reg, u16 value)
SetGpuReg: ; 80010B4
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push {r4,r5,lr}
lsls r0, 24
lsrs r4, r0, 24
lsls r1, 16
lsrs r1, 16
cmp r4, 0x5F
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bhi @08001130
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ldr r0, =0x03000818
adds r0, r4, r0
strh r1, [r0]
ldr r0, =0x04000006
ldrh r1, [r0]
movs r0, 0xFF
ands r0, r1
subs r0, 0xA1
lsls r0, 16
lsrs r0, 16
cmp r0, 0x40
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bls @080010E8
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movs r0, 0x80
lsls r0, 19
ldrh r1, [r0]
movs r0, 0x80
ands r0, r1
cmp r0, 0
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beq @080010FE
@080010E8:
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adds r0, r4, 0
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bl CopyBufferedValueToGpuReg
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b @08001130
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.pool
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@080010F8:
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movs r0, 0
strb r0, [r5]
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b @08001130
@080010FE:
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ldr r2, =0x030008d8
movs r0, 0x1
strb r0, [r2]
movs r3, 0
ldr r0, =0x03000878
ldrb r1, [r0]
adds r5, r2, 0
adds r2, r0, 0
cmp r1, 0xFF
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beq @08001128
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adds r1, r2, 0
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@08001114:
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ldrb r0, [r1]
cmp r0, r4
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beq @080010F8
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adds r1, 0x1
adds r3, 0x1
cmp r3, 0x5F
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bgt @08001128
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ldrb r0, [r1]
cmp r0, 0xFF
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bne @08001114
@08001128:
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adds r0, r3, r2
movs r1, 0
strb r4, [r0]
strb r1, [r5]
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@08001130:
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pop {r4,r5}
pop {r0}
bx r0
.pool
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thumb_func_end SetGpuReg
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thumb_func_start SetGpuReg_ScreenOff
; void SetGpuReg_ScreenOff(u8 reg, u16 value)
SetGpuReg_ScreenOff: ; 8001140
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push {r4,r5,lr}
lsls r0, 24
lsrs r4, r0, 24
lsls r1, 16
lsrs r1, 16
cmp r4, 0x5F
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bhi @080011A8
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ldr r0, =0x03000818
adds r0, r4, r0
strh r1, [r0]
movs r0, 0x80
lsls r0, 19
ldrh r1, [r0]
movs r0, 0x80
ands r0, r1
cmp r0, 0
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beq @08001176
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adds r0, r4, 0
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bl CopyBufferedValueToGpuReg
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b @080011A8
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.pool
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@08001170:
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movs r0, 0
strb r0, [r5]
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b @080011A8
@08001176:
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ldr r2, =0x030008d8
movs r0, 0x1
strb r0, [r2]
movs r3, 0
ldr r0, =0x03000878
ldrb r1, [r0]
adds r5, r2, 0
adds r2, r0, 0
cmp r1, 0xFF
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beq @080011A0
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adds r1, r2, 0
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@0800118C:
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ldrb r0, [r1]
cmp r0, r4
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beq @08001170
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adds r1, 0x1
adds r3, 0x1
cmp r3, 0x5F
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bgt @080011A0
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ldrb r0, [r1]
cmp r0, 0xFF
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bne @0800118C
@080011A0:
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adds r0, r3, r2
movs r1, 0
strb r4, [r0]
strb r1, [r5]
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@080011A8:
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pop {r4,r5}
pop {r0}
bx r0
.pool
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thumb_func_end SetGpuReg_ScreenOff
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thumb_func_start GetGpuReg
; u16 GetGpuReg(u8 reg)
GetGpuReg: ; 80011B8
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push {lr}
lsls r0, 24
lsrs r0, 24
adds r1, r0, 0
cmp r1, 0x4
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bne @080011CC
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ldr r0, =0x04000004
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b @080011DE
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.pool
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@080011CC:
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cmp r1, 0x6
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beq @080011DC
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ldr r0, =0x03000818
adds r0, r1, r0
ldrh r0, [r0]
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b @080011E0
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.pool
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@080011DC:
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ldr r0, =0x04000006
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@080011DE:
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ldrh r0, [r0]
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@080011E0:
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pop {r1}
bx r1
.pool
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thumb_func_end GetGpuReg
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thumb_func_start SetGpuRegBits
; void SetGpuRegBits(u8 reg, u16 mask)
SetGpuRegBits: ; 80011E8
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push {lr}
adds r2, r1, 0
lsls r0, 24
lsrs r0, 24
ldr r1, =0x03000818
adds r1, r0, r1
ldrh r1, [r1]
orrs r1, r2
lsls r1, 16
lsrs r1, 16
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bl SetGpuReg
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pop {r0}
bx r0
.pool
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thumb_func_end SetGpuRegBits
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thumb_func_start ResetGpuRegBits
; void ResetGpuRegBits(u8 reg, u16 mask)
ResetGpuRegBits: ; 8001208
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push {lr}
adds r2, r1, 0
lsls r0, 24
lsrs r0, 24
lsls r2, 16
ldr r1, =0x03000818
adds r1, r0, r1
ldrh r1, [r1]
lsrs r2, 16
bics r1, r2
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bl SetGpuReg
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pop {r0}
bx r0
.pool
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thumb_func_end ResetGpuRegBits
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thumb_func_start SyncIEReg
; void SyncIEReg()
SyncIEReg: ; 8001228
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push {r4,r5,lr}
ldr r5, =0x030008d9
ldrb r0, [r5]
cmp r0, 0
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beq @08001246
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ldr r2, =0x04000208
ldrh r1, [r2]
movs r4, 0
strh r4, [r2]
ldr r3, =0x04000200
ldr r0, =0x030008da
ldrh r0, [r0]
strh r0, [r3]
strh r1, [r2]
strb r4, [r5]
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@08001246:
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pop {r4,r5}
pop {r0}
bx r0
.pool
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thumb_func_end SyncIEReg
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thumb_func_start EnableInterrupts
; void EnableInterrupts(u16 mask)
EnableInterrupts: ; 800125C
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push {r4,lr}
lsls r0, 16
lsrs r0, 16
ldr r4, =0x030008da
ldrh r1, [r4]
orrs r0, r1
strh r0, [r4]
ldr r1, =0x030008d9
movs r0, 0x1
strb r0, [r1]
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bl SyncIEReg
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ldrh r0, [r4]
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bl SetDispstatVBlankHBlankInterrupts
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pop {r4}
pop {r0}
bx r0
.pool
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thumb_func_end EnableInterrupts
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thumb_func_start DisableInterrupts
; void DisableInterrupts(u16 mask)
DisableInterrupts: ; 8001288
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push {r4,lr}
lsls r0, 16
lsrs r0, 16
ldr r4, =0x030008da
ldrh r1, [r4]
bics r1, r0
strh r1, [r4]
ldr r1, =0x030008d9
movs r0, 0x1
strb r0, [r1]
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bl SyncIEReg
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ldrh r0, [r4]
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bl SetDispstatVBlankHBlankInterrupts
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pop {r4}
pop {r0}
bx r0
.pool
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thumb_func_end DisableInterrupts
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thumb_func_start SetDispstatVBlankHBlankInterrupts
; void SetDispstatVBlankHBlankInterrupts(u16 mask)
SetDispstatVBlankHBlankInterrupts: ; 80012B4
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push {r4,lr}
adds r4, r0, 0
lsls r4, 16
lsrs r4, 16
movs r0, 0x4
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bl GetGpuReg
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movs r2, 0x18
ands r2, r0
movs r1, 0x1
ands r1, r4
negs r0, r1
orrs r0, r1
asrs r1, r0, 31
movs r0, 0x8
ands r1, r0
movs r0, 0x2
ands r0, r4
cmp r0, 0
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beq @080012E0
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movs r0, 0x10
orrs r1, r0
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@080012E0:
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cmp r2, r1
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beq @080012EA
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movs r0, 0x4
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bl SetGpuReg
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@080012EA:
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pop {r4}
pop {r0}
bx r0
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thumb_func_end SetDispstatVBlankHBlankInterrupts