2018-06-24 14:09:41 +00:00
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Reset::
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2013-08-20 07:26:37 +00:00
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di
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2019-11-18 17:16:50 +00:00
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call InitSound
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2013-08-20 07:26:37 +00:00
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xor a
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2018-08-25 18:28:22 +00:00
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ldh [hMapAnims], a
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2013-08-20 07:26:37 +00:00
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call ClearPalettes
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xor a
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2018-08-25 18:28:22 +00:00
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ldh [rIF], a
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2019-05-05 16:14:46 +00:00
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ld a, 1 << VBLANK
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2018-08-25 18:28:22 +00:00
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ldh [rIE], a
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2013-08-20 07:26:37 +00:00
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ei
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2020-10-28 17:35:39 +00:00
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ld hl, wJoypadDisable
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set JOYPAD_DISABLE_SGB_TRANSFER_F, [hl]
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2013-08-20 07:26:37 +00:00
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ld c, 32
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call DelayFrames
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jr Init
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2018-06-24 14:09:41 +00:00
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_Start::
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2013-08-20 07:26:37 +00:00
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cp $11
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2015-12-26 23:11:55 +00:00
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jr z, .cgb
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2020-06-16 19:49:32 +00:00
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xor a ; FALSE
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2015-12-26 23:11:55 +00:00
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jr .load
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2013-08-20 07:26:37 +00:00
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2015-12-26 23:11:55 +00:00
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.cgb
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2020-06-16 19:49:32 +00:00
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ld a, TRUE
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2013-08-20 07:26:37 +00:00
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2015-12-26 23:11:55 +00:00
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.load
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2018-08-25 18:28:22 +00:00
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ldh [hCGB], a
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2020-06-16 19:49:32 +00:00
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ld a, TRUE
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2018-08-25 18:28:22 +00:00
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ldh [hSystemBooted], a
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2013-08-20 07:26:37 +00:00
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2018-06-24 14:09:41 +00:00
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Init::
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2013-08-20 07:26:37 +00:00
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di
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xor a
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2018-08-25 18:28:22 +00:00
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ldh [rIF], a
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ldh [rIE], a
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ldh [rRP], a
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ldh [rSCX], a
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ldh [rSCY], a
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ldh [rSB], a
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ldh [rSC], a
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ldh [rWX], a
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ldh [rWY], a
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ldh [rBGP], a
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ldh [rOBP0], a
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ldh [rOBP1], a
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ldh [rTMA], a
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ldh [rTAC], a
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2020-10-29 18:45:40 +00:00
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ld [wBetaTitleSequenceOpeningType], a
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2013-08-20 07:26:37 +00:00
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ld a, %100 ; Start timer at 4096Hz
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2018-08-25 18:28:22 +00:00
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ldh [rTAC], a
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2013-08-20 07:26:37 +00:00
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.wait
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2018-08-25 18:28:22 +00:00
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ldh a, [rLY]
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2017-12-29 17:53:21 +00:00
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cp LY_VBLANK + 1
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2013-08-20 07:26:37 +00:00
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jr nz, .wait
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xor a
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2018-08-25 18:28:22 +00:00
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ldh [rLCDC], a
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2013-08-20 07:26:37 +00:00
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; Clear WRAM bank 0
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2017-12-27 04:18:05 +00:00
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ld hl, WRAM0_Begin
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ld bc, WRAM0_End - WRAM0_Begin
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2016-04-10 18:42:14 +00:00
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.ByteFill:
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2013-08-20 07:26:37 +00:00
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ld [hl], 0
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inc hl
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dec bc
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ld a, b
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or c
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2015-12-26 23:11:55 +00:00
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jr nz, .ByteFill
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2013-08-20 07:26:37 +00:00
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2020-06-16 19:49:32 +00:00
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ld sp, wStackTop
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2013-08-20 07:26:37 +00:00
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; Clear HRAM
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2018-08-25 18:28:22 +00:00
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ldh a, [hCGB]
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2013-08-20 07:26:37 +00:00
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push af
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2018-08-25 18:28:22 +00:00
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ldh a, [hSystemBooted]
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2013-08-20 07:26:37 +00:00
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push af
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xor a
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2017-12-27 04:18:05 +00:00
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ld hl, HRAM_Begin
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ld bc, HRAM_End - HRAM_Begin
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2013-08-20 07:26:37 +00:00
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call ByteFill
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pop af
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2018-08-25 18:28:22 +00:00
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ldh [hSystemBooted], a
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2013-08-20 07:26:37 +00:00
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pop af
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2018-08-25 18:28:22 +00:00
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ldh [hCGB], a
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2013-08-20 07:26:37 +00:00
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call ClearWRAM
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2018-01-18 06:25:19 +00:00
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ld a, 1
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2018-08-25 18:28:22 +00:00
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ldh [rSVBK], a
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2013-08-20 07:26:37 +00:00
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call ClearVRAM
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call ClearSprites
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2016-05-10 16:31:49 +00:00
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call ClearsScratch
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2013-08-20 07:26:37 +00:00
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2020-06-16 19:49:32 +00:00
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ld a, BANK(WriteOAMDMACodeToHRAM) ; aka BANK(GameInit)
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2013-08-20 07:26:37 +00:00
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rst Bankswitch
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2018-01-30 19:47:14 +00:00
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call WriteOAMDMACodeToHRAM
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2013-08-20 07:26:37 +00:00
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xor a
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2018-08-25 18:28:22 +00:00
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ldh [hMapAnims], a
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ldh [hSCX], a
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ldh [hSCY], a
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ldh [rJOYP], a
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2013-08-20 07:26:37 +00:00
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ld a, $8 ; HBlank int enable
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2018-08-25 18:28:22 +00:00
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ldh [rSTAT], a
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2013-08-20 07:26:37 +00:00
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ld a, $90
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2018-08-25 18:28:22 +00:00
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ldh [hWY], a
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ldh [rWY], a
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2013-08-20 07:26:37 +00:00
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ld a, 7
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2018-08-25 18:28:22 +00:00
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ldh [hWX], a
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ldh [rWX], a
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2013-08-20 07:26:37 +00:00
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2017-12-29 18:22:33 +00:00
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ld a, LCDC_DEFAULT ; %11100011
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2013-08-20 07:26:37 +00:00
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; LCD on
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; Win tilemap 1
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; Win on
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; BG/Win tiledata 0
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; BG Tilemap 0
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; OBJ 8x8
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; OBJ on
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; BG on
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2018-08-25 18:28:22 +00:00
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ldh [rLCDC], a
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2013-08-20 07:26:37 +00:00
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2018-01-20 00:31:45 +00:00
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ld a, CONNECTION_NOT_ESTABLISHED
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2018-08-25 18:28:22 +00:00
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ldh [hSerialConnectionStatus], a
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2013-08-20 07:26:37 +00:00
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2017-12-24 17:47:30 +00:00
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farcall InitCGBPals
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2013-08-20 07:26:37 +00:00
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2017-12-28 12:32:33 +00:00
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ld a, HIGH(vBGMap1)
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2018-08-25 18:28:22 +00:00
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ldh [hBGMapAddress + 1], a
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2017-12-28 12:32:33 +00:00
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xor a ; LOW(vBGMap1)
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2018-08-25 18:28:22 +00:00
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ldh [hBGMapAddress], a
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2013-08-20 07:26:37 +00:00
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2017-12-24 17:47:30 +00:00
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farcall StartClock
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2013-08-20 07:26:37 +00:00
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2020-06-16 19:49:32 +00:00
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xor a ; SRAM_DISABLE
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2013-08-20 07:26:37 +00:00
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ld [MBC3LatchClock], a
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ld [MBC3SRamEnable], a
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2018-08-25 18:28:22 +00:00
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ldh a, [hCGB]
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2013-08-20 07:26:37 +00:00
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and a
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2016-05-05 19:07:37 +00:00
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jr z, .no_double_speed
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2013-09-08 07:12:48 +00:00
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call NormalSpeed
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2016-05-05 19:07:37 +00:00
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.no_double_speed
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2013-08-20 07:26:37 +00:00
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xor a
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2018-08-25 18:28:22 +00:00
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ldh [rIF], a
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2019-05-05 16:14:46 +00:00
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ld a, IE_DEFAULT
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2018-08-25 18:28:22 +00:00
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ldh [rIE], a
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2013-08-20 07:26:37 +00:00
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ei
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call DelayFrame
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2020-06-16 19:49:32 +00:00
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predef InitSGBBorder
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2013-08-20 07:26:37 +00:00
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2019-11-18 17:16:50 +00:00
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call InitSound
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2013-08-20 07:26:37 +00:00
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xor a
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2014-05-21 20:21:46 +00:00
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ld [wMapMusic], a
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2013-08-20 07:26:37 +00:00
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jp GameInit
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2018-06-24 14:09:41 +00:00
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ClearVRAM::
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2013-08-20 07:26:37 +00:00
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; Wipe VRAM banks 0 and 1
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ld a, 1
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2018-08-25 18:28:22 +00:00
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ldh [rVBK], a
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2013-08-20 07:26:37 +00:00
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call .clear
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2018-01-18 06:25:19 +00:00
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xor a ; 0
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2018-08-25 18:28:22 +00:00
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ldh [rVBK], a
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2013-08-20 07:26:37 +00:00
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.clear
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2018-01-18 06:25:19 +00:00
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ld hl, VRAM_Begin
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ld bc, VRAM_End - VRAM_Begin
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2013-08-20 07:26:37 +00:00
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xor a
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call ByteFill
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ret
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2018-06-24 14:09:41 +00:00
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ClearWRAM::
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2013-08-20 07:26:37 +00:00
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; Wipe swappable WRAM banks (1-7)
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2016-05-10 16:31:49 +00:00
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; Assumes CGB or AGB
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2022-07-09 21:12:02 +00:00
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; BUG: ClearWRAM only clears WRAM bank 1 (see docs/bugs_and_glitches.md)
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2013-08-20 07:26:37 +00:00
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ld a, 1
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2016-05-10 16:31:49 +00:00
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.bank_loop
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2013-08-20 07:26:37 +00:00
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push af
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2018-08-25 18:28:22 +00:00
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ldh [rSVBK], a
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2013-08-20 07:26:37 +00:00
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xor a
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2017-12-27 04:18:05 +00:00
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ld hl, WRAM1_Begin
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ld bc, WRAM1_End - WRAM1_Begin
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2013-08-20 07:26:37 +00:00
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call ByteFill
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pop af
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inc a
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cp 8
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2022-07-09 21:12:02 +00:00
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jr nc, .bank_loop
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2013-08-20 07:26:37 +00:00
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ret
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2018-06-24 14:09:41 +00:00
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ClearsScratch::
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2016-05-10 16:31:49 +00:00
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; Wipe the first 32 bytes of sScratch
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ld a, BANK(sScratch)
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2020-06-17 21:03:38 +00:00
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call OpenSRAM
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2016-05-10 16:31:49 +00:00
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ld hl, sScratch
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ld bc, $20
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2013-08-20 07:26:37 +00:00
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xor a
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call ByteFill
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call CloseSRAM
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ret
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