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1716 Commits

Author SHA1 Message Date
0xd4d 803ede15f9 ENCODEKEY{128,256}: Clear flags, only a possible future extension may set flags 2020-11-04 18:34:49 +01:00
0xd4d 34fd2aac0c Use zmmword ptr 2020-11-04 18:34:42 +01:00
0xd4d 8c78d4de73 Add reg32 to intel fmt tpause/umwait 2020-11-04 18:34:34 +01:00
0xd4d 2ebf72a156 Trim lines 2020-11-04 18:34:23 +01:00
0xd4d e8b346c307 Update implied-reg & const imm parser code 2020-10-31 16:51:00 +01:00
0xd4d 1264536c34 Clean up switch 2020-10-31 16:50:51 +01:00
0xd4d 5f388f5545 Remove modrm prefix 2020-10-31 16:50:44 +01:00
0xd4d e79a13c84c Remove unused code 2020-10-31 16:50:36 +01:00
0xd4d 7bb371db1a Remove cflow=tsx 2020-10-31 13:24:03 +01:00
0xd4d d7ae045cff Move more lines to flags line 2020-10-31 13:23:55 +01:00
0xd4d 5956636b42 Simplify ops line in defs.txt 2020-10-31 00:24:39 +01:00
0xd4d 0fe4530024 Change the props to return size in bits instead of size in bytes 2020-10-31 00:24:30 +01:00
0xd4d 97aa0cdcdd Use switch expr, reformat 2020-10-31 00:24:17 +01:00
0xd4d 28ebc9b967 Use regdef.Name instead of enum.ToString() 2020-10-31 00:24:09 +01:00
0xd4d 8a287d29a0 Add opkind defs 2020-10-29 21:44:25 +01:00
0xd4d be58b9fd73 Add mnemonic/memsz/bcstmemsz props 2020-10-29 21:41:45 +01:00
0xd4d d83f4e25bb Move branch/cc lines to flags line 2020-10-29 21:41:36 +01:00
0xd4d 1a4ed51a03 Update docs 2020-10-29 21:41:25 +01:00
0xd4d dee5a101eb Update rflags (vmlaunch,vmresume,vmptrst) 2020-10-28 01:27:36 +01:00
0xd4d ca841eb9d1 saverestore -> save-restore 2020-10-28 01:27:26 +01:00
0xd4d 0f25011858
Merge pull request #126 from 0xd4d/rel191 
Bump version
 2020-10-27 20:14:51 +01:00
0xd4d f1edb8a35a Bump version 2020-10-27 19:34:39 +01:00
0xd4d 3ed6e0eadf Update build.yml 2020-10-26 19:49:09 +01:00
0xd4d e32b6ba516 Generate sp-inc switch code 2020-10-25 21:14:37 +01:00
0xd4d c0a73435bb Add a doc example 2020-10-25 21:14:30 +01:00
0xd4d 6709d3cb1d Add FPU condition code bits and Instruction.GetFpuStackIncrementInfo() 2020-10-25 17:53:14 +01:00
0xd4d 07346b7ea6 Remove save-restore from some instrs and add accessed reg ranges 2020-10-24 11:27:16 +02:00
0xd4d 18bf2fb655 Rename flag 2020-10-24 11:27:07 +02:00
0xd4d 21eee4c7be Remove #[cfg] 2020-10-22 18:38:11 +02:00
0xd4d 6154dc84ef Test without an index (tileloadd{,t1},tilestored) 2020-10-22 18:17:36 +02:00
0xd4d 51dd9984cf Ignore stride index when calculating the VA (`TILELOADD{,T1}`, `TILESTORED`) 2020-10-22 17:53:11 +02:00
0xd4d 6bc3a87dfe Add tile-stride-index 2020-10-22 17:29:44 +02:00
0xd4d b3f730cd04 Don't show ignored segment by default, closes #111 2020-10-22 17:29:31 +02:00
0xd4d 976f2cb192 Add prefetch flag 2020-10-22 17:29:17 +02:00
0xd4d 57fbe8c4a5 monitor/mwait can be executed at CPL=3 if an MSR option is enabled 2020-10-21 22:44:01 +02:00
0xd4d 288ebbf828 Update instr info test parser to support register ranges 2020-10-21 22:43:49 +02:00
0xd4d 1e4bd6513d Update INVLPGB CPUID feature comment with info from latest AMD docs 2020-10-21 18:35:43 +02:00
0xd4d e5b1961f4e Update defs, 3 cache instrs can fault 2020-10-21 18:35:29 +02:00
0xd4d 2a69470416 Add implied-z and k-elem-selector to some instructions 2020-10-21 18:35:20 +02:00
0xd4d 4879bdc4f8 Add .github/codecov.yml 2020-10-20 23:17:11 +02:00
0xd4d a0d51b1687 Add UsedMemory.VirtualAddress() and tests (.NET, Rust) 2020-10-20 22:19:18 +02:00
0xd4d f3c7575217 Update READMEs 2020-10-20 22:19:04 +02:00
William Woodruff 02ecee0a4f
treewide: Add `UsedMemory.{try_,}virtual_address` (#125) 
* treewide: Add `UsedMemory.{try_,}virtual_address`

Adds virtual address calculation functions, rougly comparable to the ones
present on `Instruction`.

* src: `extern crate` strangeness

* treewide: Drop num_traits, don't thread Register::None

* info: Fill in VSIB support

* info: Break match out a bit

* info: Drop addr_mask

* info: `cargo fmt`
 2020-10-20 22:13:22 +02:00
0xd4d cad18c3031 Merge shift-mask-1F/3F enum values 2020-10-20 18:58:13 +02:00
0xd4d 4ac3a62a37 Reformat switch statement 2020-10-20 18:58:06 +02:00
0xd4d b954f84cc3 Update mem size parser 2020-10-20 12:04:13 +02:00
0xd4d 51d40318ad Add addr size and vsib size to UsedMemory struct 2020-10-20 11:53:04 +02:00
0xd4d b6cbec3075 Update READMEs, Cargo.toml, docs 2020-10-20 11:52:56 +02:00
0xd4d 1befdc1ff8 Bump version 2020-10-18 21:37:01 +02:00
0xd4d 2a423388fc Update READMEs 2020-10-18 16:17:27 +02:00