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Test without an index (tileloadd{,t1},tilestored)

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0xd4d 2020-10-22 18:17:36 +02:00
parent 51dd9984cf
commit 6154dc84ef
1 changed files with 6 additions and 0 deletions
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6
src/UnitTests/Intel/InstructionInfo/InstructionInfoTest_64.txt
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@ -19159,10 +19159,16 @@ C4E279 49 00, VEX_Sttilecfg_m512, VEX, AMX_TILE, op0=w r=rax wm=ds:rax;Tilecfg
C4E27B 49 D0, VEX_Tilezero_tmm, VEX, AMX_TILE, op0=w w=tmm2
# tileloaddt1 tmm2,[rcx+rdx*4]
C4E279 4B 14 91, VEX_Tileloaddt1_tmm_sibmem, VEX, AMX_TILE, op0=w op1=r w=tmm2 r=rcx;rdx rm=ds:rcx;Tile
# tileloaddt1 tmm6,[rdx-5AA5EDCCh]
C4E279 4B B4 22 34125AA5, VEX_Tileloaddt1_tmm_sibmem, VEX, AMX_TILE, op0=w op1=r w=tmm6 r=rdx rm=ds:rdx+0xFFFFFFFFA55A1234;Tile
# tilestored [rcx+rdx*4],tmm2
C4E27A 4B 14 91, VEX_Tilestored_sibmem_tmm, VEX, AMX_TILE, op0=w op1=r r=tmm2;rcx;rdx wm=ds:rcx;Tile
# tilestored [rdx-5AA5EDCCh],tmm6
C4E27A 4B B4 22 34125AA5, VEX_Tilestored_sibmem_tmm, VEX, AMX_TILE, op0=w op1=r r=tmm6;rdx wm=ds:rdx+0xFFFFFFFFA55A1234;Tile
# tileloadd tmm2,[rcx+rdx*4]
C4E27B 4B 14 91, VEX_Tileloadd_tmm_sibmem, VEX, AMX_TILE, op0=w op1=r w=tmm2 r=rcx;rdx rm=ds:rcx;Tile
# tileloadd tmm6,[rdx-5AA5EDCCh]
C4E27B 4B B4 22 34125AA5, VEX_Tileloadd_tmm_sibmem, VEX, AMX_TILE, op0=w op1=r w=tmm6 r=rdx rm=ds:rdx+0xFFFFFFFFA55A1234;Tile
# tdpbf16ps tmm2,tmm3,tmm4
C4E25A 5C D3, VEX_Tdpbf16ps_tmm_tmm_tmm, VEX, AMX_BF16, op0=rw op1=r op2=r rw=tmm2 r=tmm3;tmm4
# tdpbuud tmm2,tmm3,tmm4