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[Maintenance] Consistently use Borland's I/O port intrinsics 

Rather than preferring either the Microsoft/Watcom `(in|out)pw?` style,
or the Borland `(in|out)portb?` style, master.lib had to introduce its
own `(OUT|IN)P[BW]` naming scheme… Insert obligatory xkcd standards
comic.

Part of P0126, funded by [Anonymous] and Blue Bolt.
This commit is contained in:
nmlgc 2020-11-06 22:24:00 +01:00
parent 6c22af7e83
commit b104b3316b
9 changed files with 39 additions and 39 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
decomp.h
View File

@ -19,7 +19,7 @@
}
// Alternate version that sets the value first
#define OUTW2(port, val) __asm { \
#define outport2(port, val) __asm { \
mov ax, val; \
mov dx, port; \
out dx, ax; \

12
th01/hardware/egc.h
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@ -25,13 +25,13 @@
// Requires the EGC to have been activated before.
#define egc_setup_copy() \
OUTW2(EGC_ACTIVEPLANEREG, 0xFFF0); \
OUTW2(EGC_READPLANEREG, 0x00FF); \
outport2(EGC_ACTIVEPLANEREG, 0xFFF0); \
outport2(EGC_READPLANEREG, 0x00FF); \
/* EGC_COMPAREREAD | EGC_WS_PATREG | EGC_RL_MEMREAD */ \
OUTW2(EGC_MODE_ROP_REG, 0x3100); \
OUTW2(EGC_MASKREG, 0xFFFF); \
OUTW2(EGC_ADDRRESSREG, 0); \
OUTW2(EGC_BITLENGTHREG, 0xF);
outport2(EGC_MODE_ROP_REG, 0x3100); \
outport2(EGC_MASKREG, 0xFFFF); \
outport2(EGC_ADDRRESSREG, 0); \
outport2(EGC_BITLENGTHREG, 0xF);
// Blits the rectangle from (⌊x/16⌋*16, y) to (⌈((x + w)/16)*16⌉, (y + h))
// from VRAM page 1 to the same position on VRAM page 0.

4
th01/hardware/graph.cpp
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@ -766,7 +766,7 @@ void graph_putsa_fx(
}
grcg_setcolor_rmw(col_and_fx);
OUTB(0x68, 0xB); // CG ROM dot access
outportb(0x68, 0xB); // CG ROM dot access
while(str[0]) {
set_vram_ptr(vram, first_bit, x, top);
@ -786,7 +786,7 @@ void graph_putsa_fx(
advance_left(x, fullwidth, spacing);
}
OUTB(0x68, 0xA); // CG ROM code access
outportb(0x68, 0xA); // CG ROM code access
grcg_off_func();
}

16
th01/hardware/grppsafx.cpp
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@ -19,13 +19,13 @@
str += 1; \
} \
\
OUTB(0xA1, codepoint & 0xFF); \
OUTB(0xA3, (codepoint >> 8) - 0x20); \
outportb(0xA1, codepoint & 0xFF); \
outportb(0xA3, (codepoint >> 8) - 0x20); \
if(codepoint >= 0x2921 && codepoint <= 0x2B7E) { \
if(left <= (RES_X - GLYPH_HALF_W)) { \
for(line = 0; line < GLYPH_H; line++) { \
OUTB(0xA5, line | 0x20); \
glyph[line] = INPB(0xA9) << 8; \
outportb(0xA5, line | 0x20); \
glyph[line] = inportb(0xA9) << 8; \
} \
fullwidth = 0; \
} else { \
@ -33,10 +33,10 @@
} \
} else if(left <= (RES_X - GLYPH_FULL_W)) { \
for(line = 0; line < GLYPH_H; line++) { \
OUTB(0xA5, line | 0x20); \
glyph[line] = INPB(0xA9) << 8; \
OUTB(0xA5, line); \
glyph[line] += INPB(0xA9); \
outportb(0xA5, line | 0x20); \
glyph[line] = inportb(0xA9) << 8; \
outportb(0xA5, line); \
glyph[line] += inportb(0xA9); \
} \
fullwidth = 1; \
} else { \

14
th01/hardware/vsync.c
View File

@ -28,8 +28,8 @@ static void interrupt vsync_intfunc(void)
if(vsync_callback_is_set) {
vsync_callback();
}
OUTB(0x00, 0x20); // End of Interrupt
OUTB(0x64, 0); // VSync interrupt trigger
outportb(0x00, 0x20); // End of Interrupt
outportb(0x64, 0); // VSync interrupt trigger
}
void vsync_init(void)
@ -41,9 +41,9 @@ void vsync_init(void)
setvect(0x0A, vsync_intfunc);
// Disable all interrupts from 0x08 to 0x0F except for 0x0A
OUTB(0x02, INPB(0x02) & 0xFB);
outportb(0x02, inportb(0x02) & 0xFB);
OUTB(0x64, 0); // VSync interrupt trigger
outportb(0x64, 0); // VSync interrupt trigger
enable();
}
}
@ -55,7 +55,7 @@ void vsync_exit(void)
disable();
// Reenable all interrupts from 0x08 to 0x0F except for 0x0A
OUTB(0x02, INPB(0x02) | 0x04);
outportb(0x02, inportb(0x02) | 0x04);
setvect(0x0a, vsync_callback_old);
enable();
@ -65,10 +65,10 @@ void vsync_exit(void)
void z_vsync_wait(void)
{
do {
_AL = INPB(0x60);
_AL = inportb(0x60);
} while((_AL & 0x20) != 0);
do {
_AL = INPB(0x60);
_AL = inportb(0x60);
} while((_AL & 0x20) == 0);
}

14
th01/hardware/ztext.c
View File

@ -84,20 +84,20 @@ void z_text_hide(void)
void z_text_setcursor(z_text_cursor_t type)
{
_BX = *(char*)MK_FP(0, 0x53B);
OUTB(0x62, 0x4B); // CSRFORM
OUTB(0x60, _BL | 0x80);
outportb(0x62, 0x4B); // CSRFORM
outportb(0x60, _BL | 0x80);
switch(type) {
case CURSOR_HIDE:
OUTB(0x60, 0x9F);
outportb(0x60, 0x9F);
break;
case CURSOR_BLOCK:
OUTB(0x60, 0x80);
outportb(0x60, 0x80);
break;
case CURSOR_UNDERLINE:
OUTB(0x60, _BL + 0x7D);
outportb(0x60, _BL + 0x7D);
break;
}
OUTB(0x60, (_BL << 3) + 2);
outportb(0x60, (_BL << 3) + 2);
}
void z_text_locate(char x, char y)
@ -196,5 +196,5 @@ void z_text_print(const char *str)
regs.h.dl = *(str++);
int86(0xDC, &regs, &regs);
}
OUTB(0x64, 0); // VSync interrupt trigger
outportb(0x64, 0); // VSync interrupt trigger
}

4
th01/main/hud/hud.cpp
View File

@ -341,8 +341,8 @@ void graph_copy_hud_row_0_to_1_8(screen_x_t left, vram_y_t top, pixel_t w)
vram_offset = vram_offset_row;
for(x = 0; x < (w / 16); x++) {
#define copy_plane(plane) \
OUTW(0xA6, 0); VRAM_SNAP(dots, plane, vram_offset, 16); \
OUTW(0xA6, 1); VRAM_PUT(plane, vram_offset, dots, 16);
outport(0xA6, 0); VRAM_SNAP(dots, plane, vram_offset, 16); \
outport(0xA6, 1); VRAM_PUT(plane, vram_offset, dots, 16);
copy_plane(B);
copy_plane(R);
copy_plane(G);

4
th02/grppsafx.cpp
View File

@ -30,7 +30,7 @@ void graph_putsa_fx(
register dots16_t glyph_row_tmp;
grcg_setcolor(GC_RMW, col_and_fx);
OUTB(0x68, 0xB); // CG ROM dot access
outportb(0x68, 0xB); // CG ROM dot access
while(str[0]) {
set_vram_ptr(vram, first_bit, left, top);
@ -43,7 +43,7 @@ void graph_putsa_fx(
advance_left(left, fullwidth, spacing);
}
OUTB(0x68, 0xA); // CG ROM code access
outportb(0x68, 0xA); // CG ROM code access
grcg_off();
}

8
th04/end/box.cpp
View File

@ -31,11 +31,11 @@ void pascal near box_1_to_0_mask(box_mask_t mask)
#define CHUNK_W static_cast<int>(sizeof(dots) * BYTE_DOTS)
for(screen_y_t y = BOX_TOP; y < BOX_BOTTOM; y++) {
OUTW2(EGC_READPLANEREG, 0x00ff);
outport2(EGC_READPLANEREG, 0x00ff);
// EGC_COMPAREREAD | EGC_WS_PATREG | EGC_RL_MEMREAD
OUTW2(EGC_MODE_ROP_REG, 0x3100);
OUTW2(EGC_BITLENGTHREG, 0xF);
OUTW(EGC_MASKREG, BOX_MASKS[mask][y & 3]);
outport2(EGC_MODE_ROP_REG, 0x3100);
outport2(EGC_BITLENGTHREG, 0xF);
outport(EGC_MASKREG, BOX_MASKS[mask][y & 3]);
vram_offset_t vram_offset = vram_offset_shift(BOX_LEFT, y);
pixel_t x = 0;