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Remove rNR20/rNR40 and add rPCM12/rPCM34 (#947)

This commit is contained in:
Colton G. Rushton 2022-06-17 23:29:09 -03:00 committed by GitHub
parent 5f0597e944
commit 6a9e929bf9
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 4 additions and 6 deletions
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4
audio/engine.asm
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@ -353,7 +353,7 @@ UpdateChannels:
ldh a, [rNR52]
and %10001101 ; ch2 off
ldh [rNR52], a
ld hl, rNR20
ld hl, rNR21 - 1 ; there is no rNR20
call ClearChannel
ret
@ -491,7 +491,7 @@ endr
ldh a, [rNR52]
and %10000111 ; ch4 off
ldh [rNR52], a
ld hl, rNR40
ld hl, rNR41 - 1 ; there is no rNR40
call ClearChannel
ret

6
constants/hardware_constants.asm
View File

@ -82,7 +82,6 @@ DEF rNR11 EQU $ff11 ; Channel 1 Sound length/Wave pattern duty (R
DEF rNR12 EQU $ff12 ; Channel 1 Volume Envelope (R/W)
DEF rNR13 EQU $ff13 ; Channel 1 Frequency lo (Write Only)
DEF rNR14 EQU $ff14 ; Channel 1 Frequency hi (R/W)
DEF rNR20 EQU $ff15 ; Channel 2 Sweep register (R/W)
DEF rNR21 EQU $ff16 ; Channel 2 Sound Length/Wave Pattern Duty (R/W)
DEF rNR22 EQU $ff17 ; Channel 2 Volume Envelope (R/W)
DEF rNR23 EQU $ff18 ; Channel 2 Frequency lo data (W)
@ -92,7 +91,6 @@ DEF rNR31 EQU $ff1b ; Channel 3 Sound Length
DEF rNR32 EQU $ff1c ; Channel 3 Select output level (R/W)
DEF rNR33 EQU $ff1d ; Channel 3 Frequency's lower data (W)
DEF rNR34 EQU $ff1e ; Channel 3 Frequency's higher data (R/W)
DEF rNR40 EQU $ff1f ; Channel 4 Sweep register (R/W)
DEF rNR41 EQU $ff20 ; Channel 4 Sound Length (R/W)
DEF rNR42 EQU $ff21 ; Channel 4 Volume Envelope (R/W)
DEF rNR43 EQU $ff22 ; Channel 4 Polynomial Counter (R/W)
@ -163,6 +161,6 @@ DEF rUNKNOWN2 EQU $ff72 ; (00h) - Bit 0-7 (Read/Write)
DEF rUNKNOWN3 EQU $ff73 ; (00h) - Bit 0-7 (Read/Write)
DEF rUNKNOWN4 EQU $ff74 ; (00h) - Bit 0-7 (Read/Write) - CGB Mode Only
DEF rUNKNOWN5 EQU $ff75 ; (8Fh) - Bit 4-6 (Read/Write)
DEF rUNKNOWN6 EQU $ff76 ; (00h) - Always 00h (Read Only)
DEF rUNKNOWN7 EQU $ff77 ; (00h) - Always 00h (Read Only)
DEF rPCM12 EQU $ff76 ; Channel 1 & 2 Amplitude (R)
DEF rPCM34 EQU $ff77 ; Channel 3 & 4 Amplitude (R)
DEF rIE EQU $ffff ; Interrupt Enable (R/W)