Commit Graph

38 Commits

Author SHA1 Message Date
de4dot 0a7bbfc2a1 Update copyright years 2019-01-01 12:10:41 +01:00
de4dot b38d3e73ff Update GetOperandIndex() 2018-12-22 14:19:06 +01:00
de4dot 5eb3668d8c Update pmuldq/pmuludq memory sizes 2018-12-21 14:35:24 +01:00
de4dot 9ea817139e Add API to get instr op index and formatter op access 2018-10-26 22:21:29 +02:00
de4dot 99305ee70b Split sym resolver, also fixes #9 2018-10-24 21:24:08 +02:00
de4dot 3f18b0813f Sort 2018-10-07 22:32:18 +02:00
de4dot 5be76ac4bd Sort 2018-09-30 12:34:27 +02:00
de4dot c7ecd6447b Add formatter tests 2018-09-28 22:44:53 +02:00
de4dot 1582e8124a Rename 2018-09-27 22:29:59 +02:00
de4dot 7c5008a4fa Support 16-bit branches/ret in 64-bit mode 2018-09-25 21:25:54 +02:00
de4dot a73bd19961 Add tr0-tr7 2018-09-24 23:54:01 +02:00
de4dot fc8d71b72c Update masm table 2018-09-23 20:04:23 +02:00
de4dot ecf824d712 Sort nop/xchg code values 2018-09-21 18:50:34 +02:00
de4dot 6708ad429e Change mem size to Unknown 2018-09-21 18:50:08 +02:00
Alexandre Mutel 4ce66e5d23 Rename Xchg to r16_AX/r32_EAX/r64_RAX 2018-09-20 14:45:04 +02:00
Alexandre Mutel 2060f132f4 Add support for Code.Bswap_r16, Bswap_r32, Bswap_r64 2018-09-20 13:06:36 +02:00
Alexandre Mutel 75f480be07 Add support for Xchg_AX_r16, Xchg_EAX_r32, Xchg_RAX_r64 2018-09-20 12:52:37 +02:00
Alexandre Mutel d579af350e Add support for Mov_r8_imm8, Mov_r16_imm16, Mov_r32_imm32, Mov_r64_imm64 2018-09-20 11:46:33 +02:00
Alexandre Mutel cc16730743 Migrate instructions: Inc|Dec_r16/r32 push|pop_r16/r32/r64 2018-09-20 10:18:42 +02:00
de4dot ebc8fb103f Rename 2018-09-17 21:03:29 +02:00
de4dot b5344acd43 Rename fxsave/fxrstor 2018-09-17 21:00:53 +02:00
de4dot bfc5f296a5 Rename Xbegin REX.W Code value 2018-09-17 20:06:31 +02:00
de4dot fd61680f52 Rename Code values 2018-09-17 19:49:26 +02:00
de4dot e49702a43d Fix memory size value 2018-09-17 19:19:29 +02:00
de4dot ae0d29c7c6 Add pseudo ops tests 2018-09-14 22:21:46 +02:00
de4dot e4db0bd533 Add more tests 2018-09-14 22:21:38 +02:00
de4dot 5c6a0f45f7 Update formatters (AMD instructions) 2018-09-13 21:48:23 +02:00
de4dot b353271cc3 Update encoder tables (AMD instructions) 2018-09-12 20:47:19 +02:00
de4dot e9cf5b080b Move and rename Code values 2018-09-11 01:06:23 +02:00
de4dot 72406c934d Rename 2nd imm opkind 2018-09-11 01:06:13 +02:00
de4dot df3597b0ed Add a 5th operand 2018-09-11 01:05:03 +02:00
de4dot 585a1b3e66 Update tables so the code compiles 2018-09-09 13:31:11 +02:00
de4dot d2978e2eaf Add missing setcc [mem] tests 2018-09-07 21:08:37 +02:00
de4dot a154fd18cf Update masm + loop/loopcc output 2018-09-07 21:07:05 +02:00
de4dot d9ad7b537d Add 64-bit versions of {v,}pcmpestr[mi] 2018-09-07 21:06:51 +02:00
de4dot 1c73687139 Add 32-bit arpl 2018-09-07 21:06:33 +02:00
de4dot 87e146b78e Rename some Code values 2018-09-07 21:06:25 +02:00
de4dot 515ccfcf84 Add formatters 2018-09-06 01:38:53 +02:00