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Store regs in `int` and return only low 16 bits (opcode bits)

This commit is contained in:
wtfsck 2022-06-22 22:09:47 +02:00
parent 01bceb16f2
commit b611eebc5c
2 changed files with 9 additions and 14 deletions
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21
src/java/iced-x86/src/main/java/com/github/icedland/iced/x86/RegisterInfo.java
View File

@ -10,10 +10,10 @@ import com.github.icedland.iced.x86.internal.IcedConstants;
*/
public final class RegisterInfo {
static final RegisterInfo[] infos = createRegisterInfos();
private final byte register;
private final byte baseRegister;
private final byte fullRegister;
private final short size;
private final int register;
private final int baseRegister;
private final int fullRegister;
private final int size;
private static RegisterInfo[] createRegisterInfos() {
RegisterInfo[] regInfos = new RegisterInfo[IcedConstants.REGISTER_ENUM_COUNT];
@ -117,14 +117,9 @@ public final class RegisterInfo {
}
private RegisterInfo(int register, int baseRegister, int fullRegister, int size) {
assert baseRegister <= register : baseRegister;
assert register >= 0 && register <= 0xFF : register;
this.register = (byte)register;
assert baseRegister >= 0 && baseRegister <= 0xFF : baseRegister;
this.baseRegister = (byte)baseRegister;
assert fullRegister >= 0 && fullRegister <= 0xFF : fullRegister;
this.fullRegister = (byte)fullRegister;
assert size >= 0 && size <= 0xFFFF : size;
this.size = (short)size;
this.register = register;
this.baseRegister = baseRegister;
this.fullRegister = fullRegister;
this.size = size;
}
}

2
src/java/iced-x86/src/main/java/com/github/icedland/iced/x86/info/OpCodeInfo.java
View File

@ -1126,7 +1126,7 @@ public final class OpCodeInfo {
* ({@link Code#SUB_R8_RM8}, {@link Code#CVTPI2PS_XMM_MMM64}, etc).
*/
public int getOpCode() {
return encFlags2 >>> EncFlags2.OP_CODE_SHIFT;
return (encFlags2 >>> EncFlags2.OP_CODE_SHIFT) & 0xFFFF;
}
/**