diff --git a/Iced/Intel/Instruction.Info.cs b/Iced/Intel/Instruction.Info.cs
index 0a3ce980c..d5074aef2 100644
--- a/Iced/Intel/Instruction.Info.cs
+++ b/Iced/Intel/Instruction.Info.cs
@@ -254,7 +254,10 @@ namespace Iced.Intel {
///
/// Instruction encoding, eg. legacy, VEX, EVEX, ...
///
- public EncodingKind Encoding => Code.Encoding();
+ public EncodingKind Encoding {
+ [MethodImpl(MethodImplOptions.AggressiveInlining)]
+ get => Code.Encoding();
+ }
///
/// CPU or CPUID feature flag
@@ -273,28 +276,43 @@ namespace Iced.Intel {
///
/// Flow control info
///
- public FlowControl FlowControl => Code.FlowControl();
+ public FlowControl FlowControl {
+ [MethodImpl(MethodImplOptions.AggressiveInlining)]
+ get => Code.FlowControl();
+ }
///
/// true if the instruction isn't available in real mode or virtual 8086 mode
///
- public bool ProtectedMode => Code.ProtectedMode();
+ public bool ProtectedMode {
+ [MethodImpl(MethodImplOptions.AggressiveInlining)]
+ get => Code.ProtectedMode();
+ }
///
/// true if this is a privileged instruction
///
- public bool Privileged => Code.Privileged();
+ public bool Privileged {
+ [MethodImpl(MethodImplOptions.AggressiveInlining)]
+ get => Code.Privileged();
+ }
///
/// true if this is an instruction that implicitly uses the stack pointer (SP/ESP/RSP), eg. call, push, pop, ret, etc.
/// See also
///
- public bool StackInstruction => Code.StackInstruction();
+ public bool StackInstruction {
+ [MethodImpl(MethodImplOptions.AggressiveInlining)]
+ get => Code.StackInstruction();
+ }
///
/// true if it's an instruction that saves or restores too many registers (eg. fxrstor, xsave, etc).
///
- public bool SaveRestoreInstruction => Code.SaveRestoreInstruction();
+ public bool SaveRestoreInstruction {
+ [MethodImpl(MethodImplOptions.AggressiveInlining)]
+ get => Code.SaveRestoreInstruction();
+ }
InstructionInfoInternal.RflagsInfo GetRflagsInfo() {
var flags1 = InstructionInfoInternal.InfoHandlers.Data[(int)Code << 1];