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Rename flags enum

This commit is contained in:
wtfsck 2021-08-15 18:01:49 +02:00
parent da48629a3c
commit 5e910b28b1
12 changed files with 7347 additions and 7325 deletions
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16
src/csharp/Intel/Generator/Assembler/CSharp/CSharpAssemblerSyntaxGenerator.cs
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@ -989,23 +989,23 @@ namespace Generator.Assembler.CSharp {
var optionalOpCodeFlags = new List<string>();
if ((contextFlags & OpCodeArgFlags.HasVex) != 0)
optionalOpCodeFlags.Add("LocalOpCodeFlags.PreferVex");
optionalOpCodeFlags.Add("TestInstrFlags.PreferVex");
if ((contextFlags & OpCodeArgFlags.HasEvex) != 0)
optionalOpCodeFlags.Add("LocalOpCodeFlags.PreferEvex");
optionalOpCodeFlags.Add("TestInstrFlags.PreferEvex");
if ((contextFlags & OpCodeArgFlags.HasBroadcast) != 0)
optionalOpCodeFlags.Add("LocalOpCodeFlags.Broadcast");
optionalOpCodeFlags.Add("TestInstrFlags.Broadcast");
if ((contextFlags & OpCodeArgFlags.HasShortBranch) != 0)
optionalOpCodeFlags.Add("LocalOpCodeFlags.PreferShortBranch");
optionalOpCodeFlags.Add("TestInstrFlags.PreferShortBranch");
if ((contextFlags & OpCodeArgFlags.HasNearBranch) != 0)
optionalOpCodeFlags.Add("LocalOpCodeFlags.PreferNearBranch");
optionalOpCodeFlags.Add("TestInstrFlags.PreferNearBranch");
if ((def.Flags1 & InstructionDefFlags1.Fwait) != 0)
optionalOpCodeFlags.Add("LocalOpCodeFlags.Fwait");
optionalOpCodeFlags.Add("TestInstrFlags.Fwait");
if (group.HasLabel)
optionalOpCodeFlags.Add((group.Flags & OpCodeArgFlags.HasLabelUlong) == 0 ? "LocalOpCodeFlags.Branch" : "LocalOpCodeFlags.BranchUlong");
optionalOpCodeFlags.Add((group.Flags & OpCodeArgFlags.HasLabelUlong) == 0 ? "TestInstrFlags.Branch" : "TestInstrFlags.BranchU64");
foreach (var cpuid in def.Cpuid) {
if (cpuid.RawName.Contains("PADLOCK", StringComparison.Ordinal)) {
// They're mandatory prefix instructions but the REP prefix isn't cleared since it's shown in disassembly
optionalOpCodeFlags.Add("LocalOpCodeFlags.RemoveRepRepnePrefixes");
optionalOpCodeFlags.Add("TestInstrFlags.RemoveRepRepnePrefixes");
break;
}
}

2
src/csharp/Intel/Generator/Enums/CSharp/CSharpEnumsGenerator.cs
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@ -165,6 +165,8 @@ namespace Generator.Enums.CSharp {
toPartialFileInfo.Add(TypeIds.CC_g, new PartialEnumFileInfo("CC_g", CSharpConstants.GetFilename(genTypes, CSharpConstants.IcedNamespace, "FormatterOptions.cs"), "byte"));
toPartialFileInfo.Add(TypeIds.OptionsProps, new PartialEnumFileInfo("OptionsProps", dirs.GetCSharpTestFilename("Intel", "FormatterTests", "OptionsProps.cs"), null));
toPartialFileInfo.Add(TypeIds.TestInstrFlags, new PartialEnumFileInfo("TestInstrFlags", dirs.GetCSharpTestFilename("Intel", "AssemblerTests", "AssemblerTestsBase.cs"), null));
}
public override void Generate(EnumType enumType) {

19
src/csharp/Intel/Generator/Enums/CodeAssembler/TestInstrFlags.cs Normal file
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@ -0,0 +1,19 @@
// SPDX-License-Identifier: MIT
// Copyright (C) 2018-present iced project and contributors
namespace Generator.Enums {
[Enum("TestInstrFlags", Flags = true, NoInitialize = true)]
enum TestInstrFlags {
None = 0,
Fwait = 0x00000001,
PreferVex = 0x00000002,
PreferEvex = 0x00000004,
PreferShortBranch = 0x00000008,
PreferNearBranch = 0x00000010,
Branch = 0x00000020,
Broadcast = 0x00000040,
BranchU64 = 0x00000080,
IgnoreCode = 0x00000100,
RemoveRepRepnePrefixes = 0x00000200,
}
}

1
src/csharp/Intel/Generator/Enums/EnumsGenerator.cs
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@ -112,6 +112,7 @@ namespace Generator.Enums {
genTypes[TypeIds.DecOptionValue],
genTypes[TypeIds.InstrStrFmtOption],
genTypes[TypeIds.CodeAsmMemoryOperandSize],
genTypes[TypeIds.TestInstrFlags],
};
foreach (var enumType in allEnums)

1
src/csharp/Intel/Generator/TypeIds.cs
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@ -153,5 +153,6 @@ namespace Generator {
public static readonly TypeId CC_le = new TypeId(nameof(CC_le));
public static readonly TypeId CC_g = new TypeId(nameof(CC_g));
public static readonly TypeId CodeAsmMemoryOperandSize = new TypeId(nameof(CodeAsmMemoryOperandSize));
public static readonly TypeId TestInstrFlags = new TypeId(nameof(TestInstrFlags));
}
}

4
src/csharp/Intel/Iced.UnitTests/Intel/AssemblerTests/AssemblerTests16.cs
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@ -24,12 +24,12 @@ namespace Iced.UnitTests.Intel.AssemblerTests {
[Fact]
public void xbegin_label() {
TestAssembler(c => c.xbegin(CreateAndEmitLabel(c)), AssignLabel(Instruction.CreateXbegin(Bitness, FirstLabelId), FirstLabelId), LocalOpCodeFlags.Branch);
TestAssembler(c => c.xbegin(CreateAndEmitLabel(c)), AssignLabel(Instruction.CreateXbegin(Bitness, FirstLabelId), FirstLabelId), TestInstrFlags.Branch);
}
[Fact]
public void xbegin_offset() {
TestAssembler(c => c.xbegin(12752), Instruction.CreateXbegin(Bitness, 12752), LocalOpCodeFlags.BranchUlong);
TestAssembler(c => c.xbegin(12752), Instruction.CreateXbegin(Bitness, 12752), TestInstrFlags.BranchU64);
}
}
}

4804
src/csharp/Intel/Iced.UnitTests/Intel/AssemblerTests/AssemblerTests16.g.cs
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File diff suppressed because it is too large Load Diff

4
src/csharp/Intel/Iced.UnitTests/Intel/AssemblerTests/AssemblerTests32.cs
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@ -24,12 +24,12 @@ namespace Iced.UnitTests.Intel.AssemblerTests {
[Fact]
public void xbegin_label() {
TestAssembler(c => c.xbegin(CreateAndEmitLabel(c)), AssignLabel(Instruction.CreateXbegin(Bitness, FirstLabelId), FirstLabelId), LocalOpCodeFlags.Branch);
TestAssembler(c => c.xbegin(CreateAndEmitLabel(c)), AssignLabel(Instruction.CreateXbegin(Bitness, FirstLabelId), FirstLabelId), TestInstrFlags.Branch);
}
[Fact]
public void xbegin_offset() {
TestAssembler(c => c.xbegin(12752), Instruction.CreateXbegin(Bitness, 12752), LocalOpCodeFlags.BranchUlong | LocalOpCodeFlags.IgnoreCode);
TestAssembler(c => c.xbegin(12752), Instruction.CreateXbegin(Bitness, 12752), TestInstrFlags.BranchU64 | TestInstrFlags.IgnoreCode);
}
}
}

4804
src/csharp/Intel/Iced.UnitTests/Intel/AssemblerTests/AssemblerTests32.g.cs
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File diff suppressed because it is too large Load Diff

38
src/csharp/Intel/Iced.UnitTests/Intel/AssemblerTests/AssemblerTests64.cs
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@ -22,12 +22,12 @@ namespace Iced.UnitTests.Intel.AssemblerTests {
[Fact]
public void xbegin_label() {
TestAssembler(c => c.xbegin(CreateAndEmitLabel(c)), AssignLabel(Instruction.CreateXbegin(Bitness, FirstLabelId), FirstLabelId), LocalOpCodeFlags.Branch);
TestAssembler(c => c.xbegin(CreateAndEmitLabel(c)), AssignLabel(Instruction.CreateXbegin(Bitness, FirstLabelId), FirstLabelId), TestInstrFlags.Branch);
}
[Fact]
public void xbegin_offset() {
TestAssembler(c => c.xbegin(12752), Instruction.CreateXbegin(Bitness, 12752), LocalOpCodeFlags.BranchUlong | LocalOpCodeFlags.IgnoreCode);
TestAssembler(c => c.xbegin(12752), Instruction.CreateXbegin(Bitness, 12752), TestInstrFlags.BranchU64 | TestInstrFlags.IgnoreCode);
}
[Fact]
@ -97,18 +97,16 @@ namespace Iced.UnitTests.Intel.AssemblerTests {
Assert.Empty(result.Result);
}
#if !NO_EVEX
[Fact]
void Test_opmask_registers() {
TestAssembler(c => c.vmovups(zmm0.k1, zmm1), ApplyK(Instruction.Create(Code.EVEX_Vmovups_zmm_k1z_zmmm512, zmm0, zmm1), Register.K1), LocalOpCodeFlags.PreferEvex);
TestAssembler(c => c.vmovups(zmm0.k2, zmm1), ApplyK(Instruction.Create(Code.EVEX_Vmovups_zmm_k1z_zmmm512, zmm0, zmm1), Register.K2), LocalOpCodeFlags.PreferEvex);
TestAssembler(c => c.vmovups(zmm0.k3, zmm1), ApplyK(Instruction.Create(Code.EVEX_Vmovups_zmm_k1z_zmmm512, zmm0, zmm1), Register.K3), LocalOpCodeFlags.PreferEvex);
TestAssembler(c => c.vmovups(zmm0.k4, zmm1), ApplyK(Instruction.Create(Code.EVEX_Vmovups_zmm_k1z_zmmm512, zmm0, zmm1), Register.K4), LocalOpCodeFlags.PreferEvex);
TestAssembler(c => c.vmovups(zmm0.k5, zmm1), ApplyK(Instruction.Create(Code.EVEX_Vmovups_zmm_k1z_zmmm512, zmm0, zmm1), Register.K5), LocalOpCodeFlags.PreferEvex);
TestAssembler(c => c.vmovups(zmm0.k6, zmm1), ApplyK(Instruction.Create(Code.EVEX_Vmovups_zmm_k1z_zmmm512, zmm0, zmm1), Register.K6), LocalOpCodeFlags.PreferEvex);
TestAssembler(c => c.vmovups(zmm0.k7, zmm1), ApplyK(Instruction.Create(Code.EVEX_Vmovups_zmm_k1z_zmmm512, zmm0, zmm1), Register.K7), LocalOpCodeFlags.PreferEvex);
TestAssembler(c => c.vmovups(zmm0.k1, zmm1), ApplyK(Instruction.Create(Code.EVEX_Vmovups_zmm_k1z_zmmm512, zmm0, zmm1), Register.K1), TestInstrFlags.PreferEvex);
TestAssembler(c => c.vmovups(zmm0.k2, zmm1), ApplyK(Instruction.Create(Code.EVEX_Vmovups_zmm_k1z_zmmm512, zmm0, zmm1), Register.K2), TestInstrFlags.PreferEvex);
TestAssembler(c => c.vmovups(zmm0.k3, zmm1), ApplyK(Instruction.Create(Code.EVEX_Vmovups_zmm_k1z_zmmm512, zmm0, zmm1), Register.K3), TestInstrFlags.PreferEvex);
TestAssembler(c => c.vmovups(zmm0.k4, zmm1), ApplyK(Instruction.Create(Code.EVEX_Vmovups_zmm_k1z_zmmm512, zmm0, zmm1), Register.K4), TestInstrFlags.PreferEvex);
TestAssembler(c => c.vmovups(zmm0.k5, zmm1), ApplyK(Instruction.Create(Code.EVEX_Vmovups_zmm_k1z_zmmm512, zmm0, zmm1), Register.K5), TestInstrFlags.PreferEvex);
TestAssembler(c => c.vmovups(zmm0.k6, zmm1), ApplyK(Instruction.Create(Code.EVEX_Vmovups_zmm_k1z_zmmm512, zmm0, zmm1), Register.K6), TestInstrFlags.PreferEvex);
TestAssembler(c => c.vmovups(zmm0.k7, zmm1), ApplyK(Instruction.Create(Code.EVEX_Vmovups_zmm_k1z_zmmm512, zmm0, zmm1), Register.K7), TestInstrFlags.PreferEvex);
}
#endif
[Fact]
public void TestDeclareData_db_array() {
@ -290,7 +288,6 @@ namespace Iced.UnitTests.Intel.AssemblerTests {
}
}
#if !NO_EVEX
[Fact]
public void TestOperandModifiers() {
{
@ -298,55 +295,55 @@ namespace Iced.UnitTests.Intel.AssemblerTests {
inst.ZeroingMasking = true;
inst.OpMask = Register.K1;
inst.IsBroadcast = true;
TestAssembler(c => c.vunpcklps(xmm2.k1.z, xmm6, __dword_bcst[rax]), inst, LocalOpCodeFlags.PreferEvex);
TestAssembler(c => c.vunpcklps(xmm2.k1.z, xmm6, __dword_bcst[rax]), inst, TestInstrFlags.PreferEvex);
}
{
var inst = Instruction.Create(Code.EVEX_Vunpcklps_xmm_k1z_xmm_xmmm128b32, xmm2, xmm6, __[rax].ToMemoryOperand(64));
inst.ZeroingMasking = true;
inst.OpMask = Register.K2;
inst.IsBroadcast = true;
TestAssembler(c => c.vunpcklps(xmm2.k2.z, xmm6, __dword_bcst[rax]), inst, LocalOpCodeFlags.PreferEvex);
TestAssembler(c => c.vunpcklps(xmm2.k2.z, xmm6, __dword_bcst[rax]), inst, TestInstrFlags.PreferEvex);
}
{
var inst = Instruction.Create(Code.EVEX_Vunpcklps_xmm_k1z_xmm_xmmm128b32, xmm2, xmm6, __[rax].ToMemoryOperand(64));
inst.ZeroingMasking = true;
inst.OpMask = Register.K3;
inst.IsBroadcast = true;
TestAssembler(c => c.vunpcklps(xmm2.k3.z, xmm6, __dword_bcst[rax]), inst, LocalOpCodeFlags.PreferEvex);
TestAssembler(c => c.vunpcklps(xmm2.k3.z, xmm6, __dword_bcst[rax]), inst, TestInstrFlags.PreferEvex);
}
{
var inst = Instruction.Create(Code.EVEX_Vunpcklps_xmm_k1z_xmm_xmmm128b32, xmm2, xmm6, __[rax].ToMemoryOperand(64));
inst.ZeroingMasking = true;
inst.OpMask = Register.K4;
inst.IsBroadcast = true;
TestAssembler(c => c.vunpcklps(xmm2.k4.z, xmm6, __dword_bcst[rax]), inst, LocalOpCodeFlags.PreferEvex);
TestAssembler(c => c.vunpcklps(xmm2.k4.z, xmm6, __dword_bcst[rax]), inst, TestInstrFlags.PreferEvex);
}
{
var inst = Instruction.Create(Code.EVEX_Vunpcklps_xmm_k1z_xmm_xmmm128b32, xmm2, xmm6, __[rax].ToMemoryOperand(64));
inst.ZeroingMasking = true;
inst.OpMask = Register.K5;
inst.IsBroadcast = true;
TestAssembler(c => c.vunpcklps(xmm2.k5.z, xmm6, __dword_bcst[rax]), inst, LocalOpCodeFlags.PreferEvex);
TestAssembler(c => c.vunpcklps(xmm2.k5.z, xmm6, __dword_bcst[rax]), inst, TestInstrFlags.PreferEvex);
}
{
var inst = Instruction.Create(Code.EVEX_Vunpcklps_xmm_k1z_xmm_xmmm128b32, xmm2, xmm6, __[rax].ToMemoryOperand(64));
inst.ZeroingMasking = true;
inst.OpMask = Register.K6;
inst.IsBroadcast = true;
TestAssembler(c => c.vunpcklps(xmm2.k6.z, xmm6, __dword_bcst[rax]), inst, LocalOpCodeFlags.PreferEvex);
TestAssembler(c => c.vunpcklps(xmm2.k6.z, xmm6, __dword_bcst[rax]), inst, TestInstrFlags.PreferEvex);
}
{
var inst = Instruction.Create(Code.EVEX_Vunpcklps_xmm_k1z_xmm_xmmm128b32, xmm2, xmm6, __[rax].ToMemoryOperand(64));
inst.ZeroingMasking = true;
inst.OpMask = Register.K7;
inst.IsBroadcast = true;
TestAssembler(c => c.vunpcklps(xmm2.k7.z, xmm6, __dword_bcst[rax]), inst, LocalOpCodeFlags.PreferEvex);
TestAssembler(c => c.vunpcklps(xmm2.k7.z, xmm6, __dword_bcst[rax]), inst, TestInstrFlags.PreferEvex);
}
{
var inst = Instruction.Create(Code.EVEX_Vcvttss2si_r64_xmmm32_sae, rax, xmm1);
inst.SuppressAllExceptions = true;
TestAssembler(c => c.vcvttss2si(rax, xmm1.sae), inst, LocalOpCodeFlags.PreferEvex);
TestAssembler(c => c.vcvttss2si(rax, xmm1.sae), inst, TestInstrFlags.PreferEvex);
}
{
var inst = Instruction.Create(Code.EVEX_Vaddpd_zmm_k1z_zmm_zmmm512b64_er, zmm1, zmm2, zmm3);
@ -375,7 +372,6 @@ namespace Iced.UnitTests.Intel.AssemblerTests {
TestAssembler(c => c.vaddpd(zmm1.k3.z, zmm2, zmm3.rz_sae), inst);
}
}
#endif
}
}
#endif

4922
src/csharp/Intel/Iced.UnitTests/Intel/AssemblerTests/AssemblerTests64.g.cs
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File diff suppressed because it is too large Load Diff

57
src/csharp/Intel/Iced.UnitTests/Intel/AssemblerTests/AssemblerTestsBase.cs
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@ -17,18 +17,18 @@ namespace Iced.UnitTests.Intel.AssemblerTests {
public int Bitness => bitness;
protected void TestAssembler(Action<Assembler> fAsm, Instruction expected, LocalOpCodeFlags flags = LocalOpCodeFlags.None,
private protected void TestAssembler(Action<Assembler> fAsm, Instruction expected, TestInstrFlags flags = TestInstrFlags.None,
DecoderOptions decoderOptions = DecoderOptions.None) {
var assembler = new Assembler(bitness);
// Encode the instruction
if ((flags & LocalOpCodeFlags.PreferVex) != 0)
if ((flags & TestInstrFlags.PreferVex) != 0)
assembler.PreferVex = true;
else if ((flags & LocalOpCodeFlags.PreferEvex) != 0)
else if ((flags & TestInstrFlags.PreferEvex) != 0)
assembler.PreferVex = false;
if ((flags & LocalOpCodeFlags.PreferShortBranch) != 0)
if ((flags & TestInstrFlags.PreferShortBranch) != 0)
assembler.PreferShortBranch = true;
else if ((flags & LocalOpCodeFlags.PreferNearBranch) != 0)
else if ((flags & TestInstrFlags.PreferNearBranch) != 0)
assembler.PreferShortBranch = false;
fAsm(assembler);
@ -36,14 +36,14 @@ namespace Iced.UnitTests.Intel.AssemblerTests {
Assert.Equal(1, assembler.Instructions.Count);
// Check that the instruction is the one expected
if ((flags & LocalOpCodeFlags.Broadcast) != 0)
if ((flags & TestInstrFlags.Broadcast) != 0)
expected.IsBroadcast = true;
var asmInstr = assembler.Instructions[0];
Assert.Equal(expected, asmInstr);
// Encode the instruction first to get any errors
var writer = new CodeWriterImpl();
assembler.Assemble(writer, 0, (flags & LocalOpCodeFlags.BranchUlong) != 0 ? BlockEncoderOptions.None : BlockEncoderOptions.DontFixBranches);
assembler.Assemble(writer, 0, (flags & TestInstrFlags.BranchU64) != 0 ? BlockEncoderOptions.None : BlockEncoderOptions.DontFixBranches);
// Check decoding back against the original instruction
var instructionAsBytes = new System.Text.StringBuilder();
@ -52,13 +52,13 @@ namespace Iced.UnitTests.Intel.AssemblerTests {
var decoder = Decoder.Create(bitness, new ByteArrayCodeReader(writer.ToArray()), decoderOptions);
var decodedInstr = decoder.Decode();
if ((flags & LocalOpCodeFlags.IgnoreCode) != 0)
if ((flags & TestInstrFlags.IgnoreCode) != 0)
decodedInstr.Code = asmInstr.Code;
if ((flags & LocalOpCodeFlags.RemoveRepRepnePrefixes) != 0) {
if ((flags & TestInstrFlags.RemoveRepRepnePrefixes) != 0) {
decodedInstr.HasRepPrefix = false;
decodedInstr.HasRepnePrefix = false;
}
if ((flags & LocalOpCodeFlags.Fwait) != 0) {
if ((flags & TestInstrFlags.Fwait) != 0) {
Assert.Equal(decodedInstr, Instruction.Create(Code.Wait));
decodedInstr = decoder.Decode();
decodedInstr.Code = decodedInstr.Code switch {
@ -80,12 +80,12 @@ namespace Iced.UnitTests.Intel.AssemblerTests {
};
}
if (asmInstr.Code != Code.Jmpe_disp16 && asmInstr.Code != Code.Jmpe_disp32 && (flags & LocalOpCodeFlags.Branch) != 0)
if (asmInstr.Code != Code.Jmpe_disp16 && asmInstr.Code != Code.Jmpe_disp32 && (flags & TestInstrFlags.Branch) != 0)
asmInstr.NearBranch64 = 0;
// Short branches can be fixed if the target is too far away.
// Eg. `loopne target` => `loopne jmpt; jmp short skip; jmpt: jmp near target; skip:`
if ((flags & LocalOpCodeFlags.BranchUlong) != 0) {
if ((flags & TestInstrFlags.BranchU64) != 0) {
asmInstr.Code = asmInstr.Code.ToShortBranch();
decodedInstr.Code = decodedInstr.Code.ToShortBranch();
Assert.Equal(asmInstr.Code, decodedInstr.Code);
@ -151,21 +151,24 @@ namespace Iced.UnitTests.Intel.AssemblerTests {
var exception = Assert.Throws<InvalidOperationException>(action);
Assert.Contains("Unable to calculate an OpCode", exception.Message);
}
[Flags]
protected enum LocalOpCodeFlags {
None = 0,
Fwait = 1 << 0,
PreferVex = 1 << 1,
PreferEvex = 1 << 2,
PreferShortBranch = 1 << 3,
PreferNearBranch = 1 << 4,
Branch = 1 << 5,
Broadcast = 1 << 6,
BranchUlong = 1 << 7,
IgnoreCode = 1 << 8,
RemoveRepRepnePrefixes = 1 << 9,
}
}
// GENERATOR-BEGIN: TestInstrFlags
// ⚠️This was generated by GENERATOR!🦹‍♂️
[Flags]
enum TestInstrFlags {
None = 0x00000000,
Fwait = 0x00000001,
PreferVex = 0x00000002,
PreferEvex = 0x00000004,
PreferShortBranch = 0x00000008,
PreferNearBranch = 0x00000010,
Branch = 0x00000020,
Broadcast = 0x00000040,
BranchU64 = 0x00000080,
IgnoreCode = 0x00000100,
RemoveRepRepnePrefixes = 0x00000200,
}
// GENERATOR-END: TestInstrFlags
}
#endif