mirror of https://github.com/icedland/iced.git
Move Instruction Create() and info code to new files
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de4dot
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/*
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Copyright (C) 2018 de4dot@gmail.com
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This file is part of Iced.
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Iced is free software: you can redistribute it and/or modify
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it under the terms of the GNU Lesser General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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Iced is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public License
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along with Iced. If not, see <https://www.gnu.org/licenses/>.
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*/
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#if !NO_INSTR_INFO
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using System.Diagnostics;
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namespace Iced.Intel {
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partial struct Instruction {
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/// <summary>
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/// Gets the number of bytes added to SP/ESP/RSP or 0 if it's not an instruction that pushes or pops data. This method
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/// assumes the instruction doesn't change privilege (eg. iret/d/q). If it's the leave instruction, this method returns 0.
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/// </summary>
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/// <returns></returns>
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public int StackPointerIncrement {
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get {
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switch (Code) {
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case Code.Pushw_ES:
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case Code.Pushw_CS:
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case Code.Pushw_SS:
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case Code.Pushw_DS:
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case Code.Push_r16:
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case Code.Push_imm16:
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case Code.Pushw_imm8:
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case Code.Pushfw:
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case Code.Push_rm16:
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case Code.Pushw_FS:
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case Code.Pushw_GS:
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return -2;
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case Code.Pushd_ES:
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case Code.Pushd_CS:
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case Code.Pushd_SS:
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case Code.Pushd_DS:
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case Code.Push_r32:
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case Code.Pushd_imm32:
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case Code.Pushd_imm8:
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case Code.Pushfd:
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case Code.Push_rm32:
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case Code.Pushd_FS:
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case Code.Pushd_GS:
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return -4;
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case Code.Push_r64:
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case Code.Pushq_imm32:
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case Code.Pushq_imm8:
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case Code.Pushfq:
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case Code.Push_rm64:
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case Code.Pushq_FS:
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case Code.Pushq_GS:
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return -8;
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case Code.Pushaw:
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return -2 * 8;
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case Code.Pushad:
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return -4 * 8;
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case Code.Popw_ES:
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case Code.Popw_SS:
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case Code.Popw_DS:
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case Code.Pop_r16:
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case Code.Pop_rm16:
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case Code.Popfw:
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case Code.Popw_FS:
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case Code.Popw_GS:
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return 2;
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case Code.Popd_ES:
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case Code.Popd_SS:
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case Code.Popd_DS:
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case Code.Pop_r32:
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case Code.Pop_rm32:
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case Code.Popfd:
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case Code.Popd_FS:
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case Code.Popd_GS:
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return 4;
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case Code.Pop_r64:
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case Code.Pop_rm64:
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case Code.Popfq:
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case Code.Popq_FS:
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case Code.Popq_GS:
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return 8;
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case Code.Popaw:
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return 2 * 8;
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case Code.Popad:
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return 4 * 8;
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case Code.Call_ptr1616:
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case Code.Call_m1616:
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return -(2 + 2);
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case Code.Call_ptr3216:
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case Code.Call_m3216:
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return -(4 + 4);
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case Code.Call_m6416:
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return -(8 + 8);
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case Code.Call_rel16:
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case Code.Call_rm16:
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return -2;
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case Code.Call_rel32_32:
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case Code.Call_rm32:
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return -4;
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case Code.Call_rel32_64:
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case Code.Call_rm64:
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return -8;
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case Code.Retnw_imm16:
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return 2 + Immediate16;
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case Code.Retnd_imm16:
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return 4 + Immediate16;
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case Code.Retnq_imm16:
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return 8 + Immediate16;
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case Code.Retnw:
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return 2;
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case Code.Retnd:
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return 4;
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case Code.Retnq:
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return 8;
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case Code.Retfw_imm16:
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return 2 + 2 + Immediate16;
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case Code.Retfd_imm16:
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return 4 + 4 + Immediate16;
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case Code.Retfq_imm16:
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return 8 + 8 + Immediate16;
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case Code.Retfw:
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return 2 + 2;
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case Code.Retfd:
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return 4 + 4;
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case Code.Retfq:
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return 8 + 8;
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case Code.Iretw:
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if (CodeSize == CodeSize.Code64)
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return 2 * 5;
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return 2 * 3;
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case Code.Iretd:
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if (CodeSize == CodeSize.Code64)
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return 4 * 5;
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return 4 * 3;
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case Code.Iretq:
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return 8 * 5;
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case Code.Enterw_imm16_imm8:
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return -(2 + (Immediate8_2nd & 0x1F) * 2 + Immediate16);
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case Code.Enterd_imm16_imm8:
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return -(4 + (Immediate8_2nd & 0x1F) * 4 + Immediate16);
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case Code.Enterq_imm16_imm8:
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return -(8 + (Immediate8_2nd & 0x1F) * 8 + Immediate16);
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case Code.Leavew:
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case Code.Leaved:
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case Code.Leaveq:
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return 0;
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default:
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return 0;
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}
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}
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}
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/// <summary>
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/// (This method allocates and is slower than using an <see cref="InstructionInfoFactory"/>.)
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///
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/// Gets instruction info such as which register is read and written etc.
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/// </summary>
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/// <returns></returns>
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public InstructionInfo GetInfo() {
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var usedRegisters = InstructionInfoInternal.SimpleList<UsedRegister>.Empty;
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var usedMemoryLocations = InstructionInfoInternal.SimpleList<UsedMemory>.Empty;
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return InstructionInfoFactory.Create(ref this, ref usedRegisters, ref usedMemoryLocations, InstructionInfoOptions.None);
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}
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/// <summary>
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/// (This method allocates and is slower than using an <see cref="InstructionInfoFactory"/>.)
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///
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/// Gets instruction info such as which register is read and written etc.
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/// </summary>
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/// <param name="options">Options</param>
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/// <returns></returns>
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public InstructionInfo GetInfo(InstructionInfoOptions options) {
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var usedRegisters = InstructionInfoInternal.SimpleList<UsedRegister>.Empty;
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var usedMemoryLocations = InstructionInfoInternal.SimpleList<UsedMemory>.Empty;
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return InstructionInfoFactory.Create(ref this, ref usedRegisters, ref usedMemoryLocations, options);
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}
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/// <summary>
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/// (This method allocates and is slower than using an <see cref="InstructionInfoFactory"/>.)
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///
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/// Gets a struct iterator that returns all read and written registers. There are some exceptions, this method doesn't return all used registers:
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///
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/// 1) If <see cref="SaveRestoreInstruction"/> is true, or
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///
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/// 2) If it's a <see cref="FlowControl.Call"/> or <see cref="FlowControl.Interrupt"/> instruction (call, sysenter, int n etc), it can read and write any register (including RFLAGS).
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/// </summary>
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/// <returns></returns>
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public InstructionInfo.UsedRegisterIterator GetUsedRegisters() {
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var usedRegisters = InstructionInfoInternal.SimpleList<UsedRegister>.Empty;
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var usedMemoryLocations = InstructionInfoInternal.SimpleList<UsedMemory>.Empty;
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return InstructionInfoFactory.Create(ref this, ref usedRegisters, ref usedMemoryLocations, InstructionInfoOptions.NoMemoryUsage).GetUsedRegisters();
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}
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/// <summary>
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/// (This method allocates and is slower than using an <see cref="InstructionInfoFactory"/>.)
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///
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/// Gets a struct iterator that returns all read and written memory locations
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/// </summary>
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/// <returns></returns>
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public InstructionInfo.UsedMemoryIterator GetUsedMemory() {
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var usedRegisters = InstructionInfoInternal.SimpleList<UsedRegister>.Empty;
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var usedMemoryLocations = InstructionInfoInternal.SimpleList<UsedMemory>.Empty;
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return InstructionInfoFactory.Create(ref this, ref usedRegisters, ref usedMemoryLocations, InstructionInfoOptions.NoRegisterUsage).GetUsedMemory();
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}
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/// <summary>
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/// Instruction encoding, eg. legacy, VEX, EVEX, ...
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/// </summary>
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public EncodingKind Encoding => Code.Encoding();
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/// <summary>
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/// CPU or CPUID feature flag
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/// </summary>
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public CpuidFeature CpuidFeature {
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get {
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var code = Code;
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var cpuidFeature = code.CpuidFeature();
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if (cpuidFeature == CpuidFeature.AVX && Op1Kind == OpKind.Register && (code == Code.VEX_Vbroadcastss_xmm_xmmm32 || code == Code.VEX_Vbroadcastss_ymm_xmmm32 || code == Code.VEX_Vbroadcastsd_ymm_xmmm64))
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return CpuidFeature.AVX2;
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return cpuidFeature;
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}
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}
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/// <summary>
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/// Flow control info
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/// </summary>
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public FlowControl FlowControl => Code.FlowControl();
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/// <summary>
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/// true if the instruction isn't available in real mode or virtual 8086 mode
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/// </summary>
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public bool ProtectedMode => Code.ProtectedMode();
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/// <summary>
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/// true if this is a privileged instruction
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/// </summary>
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public bool Privileged => Code.Privileged();
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/// <summary>
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/// true if this is an instruction that implicitly uses the stack pointer (SP/ESP/RSP), eg. call, push, pop, ret, etc.
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/// See also <see cref="StackPointerIncrement"/>
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/// </summary>
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public bool StackInstruction => Code.StackInstruction();
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/// <summary>
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/// true if it's an instruction that saves or restores too many registers (eg. fxrstor, xsave, etc).
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/// </summary>
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public bool SaveRestoreInstruction => Code.SaveRestoreInstruction();
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InstructionInfoInternal.RflagsInfo GetRflagsInfo() {
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var flags1 = InstructionInfoInternal.InfoHandlers.Data[(int)Code << 1];
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var codeInfo = (InstructionInfoInternal.CodeInfo)((flags1 >> (int)InstructionInfoInternal.InfoFlags1.CodeInfoShift) & (uint)InstructionInfoInternal.InfoFlags1.CodeInfoMask);
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Debug.Assert(InstructionInfoInternal.CodeInfo.Shift_Ib_MASK1FMOD9 + 1 == InstructionInfoInternal.CodeInfo.Shift_Ib_MASK1FMOD11);
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Debug.Assert(InstructionInfoInternal.CodeInfo.Shift_Ib_MASK1FMOD9 + 2 == InstructionInfoInternal.CodeInfo.Shift_Ib_MASK1F);
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Debug.Assert(InstructionInfoInternal.CodeInfo.Shift_Ib_MASK1FMOD9 + 3 == InstructionInfoInternal.CodeInfo.Shift_Ib_MASK3F);
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if ((uint)(codeInfo - InstructionInfoInternal.CodeInfo.Shift_Ib_MASK1FMOD9) <= 3) {
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switch (codeInfo) {
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case InstructionInfoInternal.CodeInfo.Shift_Ib_MASK1FMOD9:
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if ((Immediate8 & 0x1F) % 9 == 0)
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return InstructionInfoInternal.RflagsInfo.None;
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break;
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case InstructionInfoInternal.CodeInfo.Shift_Ib_MASK1FMOD11:
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if ((Immediate8 & 0x1F) % 17 == 0)
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return InstructionInfoInternal.RflagsInfo.None;
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break;
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case InstructionInfoInternal.CodeInfo.Shift_Ib_MASK1F:
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if ((Immediate8 & 0x1F) == 0)
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return InstructionInfoInternal.RflagsInfo.None;
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break;
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case InstructionInfoInternal.CodeInfo.Shift_Ib_MASK3F:
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if ((Immediate8 & 0x3F) == 0)
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return InstructionInfoInternal.RflagsInfo.None;
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break;
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}
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}
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return (InstructionInfoInternal.RflagsInfo)((flags1 >> (int)InstructionInfoInternal.InfoFlags1.RflagsInfoShift) & (uint)InstructionInfoInternal.InfoFlags1.RflagsInfoMask);
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}
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/// <summary>
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/// All flags that are read by the CPU when executing the instruction
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/// </summary>
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public RflagsBits RflagsRead => (RflagsBits)InstructionInfoInternal.RflagsInfoConstants.flagsRead[(int)GetRflagsInfo()];
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/// <summary>
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/// All flags that are written by the CPU, except those flags that are known to be undefined, always set or always cleared. See also <see cref="RflagsModified"/>
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/// </summary>
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public RflagsBits RflagsWritten => (RflagsBits)InstructionInfoInternal.RflagsInfoConstants.flagsWritten[(int)GetRflagsInfo()];
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/// <summary>
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/// All flags that are always cleared by the CPU
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/// </summary>
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public RflagsBits RflagsCleared => (RflagsBits)InstructionInfoInternal.RflagsInfoConstants.flagsCleared[(int)GetRflagsInfo()];
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/// <summary>
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/// All flags that are always set by the CPU
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/// </summary>
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public RflagsBits RflagsSet => (RflagsBits)InstructionInfoInternal.RflagsInfoConstants.flagsSet[(int)GetRflagsInfo()];
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/// <summary>
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/// All flags that are undefined after executing the instruction
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/// </summary>
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public RflagsBits RflagsUndefined => (RflagsBits)InstructionInfoInternal.RflagsInfoConstants.flagsUndefined[(int)GetRflagsInfo()];
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/// <summary>
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/// All flags that are modified by the CPU. This is <see cref="RflagsWritten"/> + <see cref="RflagsCleared"/> + <see cref="RflagsSet"/> + <see cref="RflagsUndefined"/>
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/// </summary>
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public RflagsBits RflagsModified => (RflagsBits)InstructionInfoInternal.RflagsInfoConstants.flagsModified[(int)GetRflagsInfo()];
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}
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}
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#endif
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