mirror of https://github.com/BOINC/boinc.git
client: Properly calculate the peak FLOPS of new AMD GPU(s) that only support OpenCL.
Use AMD's vendor specific extension if it is available to calculate the total number of shaders and determine the peak FLOP rate from that. My new GPU I got for Christmas was only reporting 30% of its peak FLOP rate and does not support CAL.
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@ -877,6 +877,46 @@ cl_int COPROCS::get_opencl_info(
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return ciErrNum;
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}
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ciErrNum = (*__clGetDeviceInfo)(prop.device_id, CL_DEVICE_SIMD_PER_COMPUTE_UNIT_AMD, sizeof(prop.amd_simd_per_compute_unit), &prop.amd_simd_per_compute_unit, NULL);
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if (ciErrNum != CL_SUCCESS) {
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snprintf(buf, sizeof(buf),
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"clGetDeviceInfo failed to get CL_DEVICE_SIMD_PER_COMPUTE_UNIT_AMD for device %d",
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(int)device_index
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);
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warnings.push_back(buf);
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return ciErrNum;
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}
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ciErrNum = (*__clGetDeviceInfo)(prop.device_id, CL_DEVICE_SIMD_WIDTH_AMD, sizeof(prop.amd_simd_width), &prop.amd_simd_width, NULL);
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if (ciErrNum != CL_SUCCESS) {
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snprintf(buf, sizeof(buf),
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"clGetDeviceInfo failed to get CL_DEVICE_SIMD_WIDTH_AMD for device %d",
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(int)device_index
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);
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warnings.push_back(buf);
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return ciErrNum;
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}
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ciErrNum = (*__clGetDeviceInfo)(prop.device_id, CL_DEVICE_SIMD_INSTRUCTION_WIDTH_AMD, sizeof(prop.amd_simd_instruction_width), &prop.amd_simd_instruction_width, NULL);
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if (ciErrNum != CL_SUCCESS) {
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snprintf(buf, sizeof(buf),
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"clGetDeviceInfo failed to get CL_DEVICE_SIMD_INSTRUCTION_WIDTH_AMD for device %d",
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(int)device_index
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);
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warnings.push_back(buf);
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return ciErrNum;
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}
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ciErrNum = (*__clGetDeviceInfo)(prop.device_id, CL_DEVICE_WAVEFRONT_WIDTH_AMD, sizeof(prop.amd_wavefront_width), &prop.amd_wavefront_width, NULL);
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if (ciErrNum != CL_SUCCESS) {
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snprintf(buf, sizeof(buf),
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"clGetDeviceInfo failed to get CL_DEVICE_WAVEFRONT_WIDTH_AMD for device %d",
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(int)device_index
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);
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warnings.push_back(buf);
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return ciErrNum;
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}
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}
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return CL_SUCCESS;
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@ -773,6 +773,14 @@ void COPROC_ATI::set_peak_flops() {
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if (attribs.numberOfSIMD) {
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x = attribs.numberOfSIMD * attribs.wavefrontSize * 5 * attribs.engineClock * 1.e6;
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// clock is in MHz
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} else if (opencl_prop.amd_simd_per_compute_unit) {
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// OpenCL w/ cl_amd_device_attribute_query extension
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// Per: https://en.wikipedia.org/wiki/List_of_AMD_graphics_processing_units
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//
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// Single precision performance is calculated as two times the number of shaders multiplied by the base core clock speed.
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//
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// clock is in MHz
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x = opencl_prop.max_compute_units * opencl_prop.amd_simd_per_compute_unit * opencl_prop.amd_simd_width * 2 * (opencl_prop.max_clock_frequency * 1.e6);
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} else if (opencl_prop.max_compute_units) {
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// OpenCL gives us only:
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// - max_compute_units
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@ -60,6 +60,10 @@ void OPENCL_DEVICE_PROP::write_xml(MIOFILE& f, const char* tag, bool temp_file)
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" <local_mem_size>%llu</local_mem_size>\n"
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" <max_clock_frequency>%lu</max_clock_frequency>\n"
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" <max_compute_units>%lu</max_compute_units>\n"
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" <amd_simd_per_compute_unit>%lu</amd_simd_per_compute_unit>\n"
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" <amd_simd_width>%lu</amd_simd_width>\n"
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" <amd_simd_instruction_width>%lu</amd_simd_instruction_width>\n"
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" <amd_wavefront_width>%lu</amd_wavefront_width>\n"
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" <opencl_platform_version>%s</opencl_platform_version>\n"
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" <opencl_device_version>%s</opencl_device_version>\n"
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" <opencl_driver_version>%s</opencl_driver_version>\n",
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@ -78,6 +82,10 @@ void OPENCL_DEVICE_PROP::write_xml(MIOFILE& f, const char* tag, bool temp_file)
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local_mem_size,
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(unsigned long)max_clock_frequency,
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(unsigned long)max_compute_units,
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(unsigned long)amd_simd_per_compute_unit,
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(unsigned long)amd_simd_width,
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(unsigned long)amd_simd_instruction_width,
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(unsigned long)amd_wavefront_width,
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opencl_platform_version,
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opencl_device_version,
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opencl_driver_version
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@ -161,6 +169,22 @@ int OPENCL_DEVICE_PROP::parse(XML_PARSER& xp, const char* end_tag) {
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max_compute_units = n;
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continue;
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}
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if (xp.parse_int("amd_simd_per_compute_unit", n)) {
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amd_simd_per_compute_unit = n;
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continue;
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}
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if (xp.parse_int("amd_simd_width", n)) {
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amd_simd_width = n;
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continue;
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}
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if (xp.parse_int("amd_simd_instruction_width", n)) {
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amd_simd_instruction_width = n;
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continue;
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}
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if (xp.parse_int("amd_wavefront_width", n)) {
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amd_wavefront_width = n;
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continue;
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}
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if (xp.parse_str("opencl_platform_version",
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opencl_platform_version,
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sizeof(opencl_platform_version)
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@ -50,6 +50,19 @@ struct OPENCL_DEVICE_PROP {
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cl_ulong local_mem_size;
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cl_uint max_clock_frequency; // in MHz
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cl_uint max_compute_units;
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//
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// cl_nv_device_attribute_query
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//
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//
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// cl_amd_device_attribute_query
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//
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cl_uint amd_simd_per_compute_unit;
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cl_uint amd_simd_width;
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cl_uint amd_simd_instruction_width;
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cl_uint amd_wavefront_width;
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char opencl_platform_version[64]; // Version of OpenCL supported
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// the device's platform
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char opencl_device_version[64]; // OpenCL version supported by device;
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