ReC98/th03/formats
nmlgc 8835d59eda [Build] [th03] Keep hflip_lut_generate() in ASM due to alignment issues
Nooooo, gotta throw away that decompilation for the stupidest of
reasons :( Turns out that a function may also be "undecompilable" if
the original code layout places it at a word-aligned address, but the
last byte of the previous function in just one of the original binaries
(TH03's MAIN.EXE, in this case) also lies at a word-aligned address.
There's simply no way to enforce per-function word alignment in Turbo
C++ alone. You *could* fake it with `#pragma codestring`, but of course
that won't work for functions that are part of the SHARED segment, and
where the alignment previously would have been correct. Conditionally
emitting that codestring would work, but then we'd also have to compile
that translation unit at least twice.

Now, I could have created a dummy .ASM file that just contains a single
zero-length but word-aligned SHARED segment, which could be placed
anywhere on the link command line where word alignment is needed… but
the decompilation of this function was a mess anyway, and probably
helped nobody.

Part of P0127, funded by [Anonymous].
2020-11-16 20:01:34 +01:00
..
cdg.h [Maintenance] Declare CDG blitting functions in C land 2020-09-21 15:00:01 +02:00
cdg.inc [Reverse-engineering] [th03] CDG: VRAM plane iteration 2020-09-07 21:18:38 +02:00
cdg[bss].asm [Maintenance] [th03/th04/th05] Declare the CDG slot structure in C land 2020-09-07 21:18:37 +02:00
cdg[data].asm [Reverse-engineering] [th03] CDG loading 2018-10-16 00:47:58 +02:00
cdg_free_all.asm [Maintenance] [th03/th04/th05] Declare CDG loading/freeing functions in C land 2020-09-07 21:18:38 +02:00
cdg_load.asm [Maintenance] [th03/th04/th05] Declare CDG loading/freeing functions in C land 2020-09-07 21:18:38 +02:00
cdg_put.asm [Maintenance] Declare CDG blitting functions in C land 2020-09-21 15:00:01 +02:00
cdg_put_dissolve.asm [Maintenance] Declare CDG blitting functions in C land 2020-09-21 15:00:01 +02:00
cdg_put_dissolve[data].asm [Reverse-engineering] [th03/mainl] Dissolved CDG display 2018-10-16 01:04:46 +02:00
cdg_put_hflip.asm [Maintenance] Declare CDG blitting functions in C land 2020-09-21 15:00:01 +02:00
cdg_unput_upwards.asm [Maintenance] Declare CDG blitting functions in C land 2020-09-21 15:00:01 +02:00
cfg.hpp [Decompilation] [th03] YUME.CFG loading and saving 2020-09-07 21:18:40 +02:00
cfg.inc [Reverse-engineering] [th03/th04/th05] Configuration file 2020-02-23 17:24:17 +01:00
cfg[data].asm [Reverse-engineering] [th03/th04/th05] Configuration file 2020-02-23 17:24:17 +01:00
cfg_lres.asm [Reverse-engineering] [th03/th04/th05] Configuration file 2020-02-23 17:24:17 +01:00
cfg_lres[data].asm [Reverse-engineering] [th03/th04/th05] Configuration file 2020-02-23 17:24:17 +01:00
hfliplut.asm [Build] [th03] Keep hflip_lut_generate() in ASM due to alignment issues 2020-11-16 20:01:34 +01:00
hfliplut.h [Decompilation] [th03] Lookup table for horizontally flipping planar pixels 2020-09-07 21:18:38 +02:00
hfliplut[bss].asm [Decompilation] [th03] Lookup table for horizontally flipping planar pixels 2020-09-07 21:18:38 +02:00
mrs.cpp [Decompilation] [th03] .MRS: Slot loading function 2020-11-16 20:01:34 +01:00
mrs.hpp [Decompilation] [th03] .MRS: Slot loading function 2020-11-16 20:01:34 +01:00
pfopen.asm [Maintenance] Fix any whitespace issues in our own code 2015-09-07 15:44:48 +02:00
pi.h [Maintenance] Indicate byte alignment for all .PI blitting functions 2020-11-02 22:19:12 +01:00
pi_put_interlace.asm [Maintenance] Indicate byte alignment for all .PI blitting functions 2020-11-02 22:19:12 +01:00
pi_put_mask[data].asm [Maintenance] Drop the `slot` infix for PI-related identifiers 2020-09-07 21:18:39 +02:00
pi_put_quarter.asm [Maintenance] Indicate byte alignment for all .PI blitting functions 2020-11-02 22:19:12 +01:00
scoredat.h [Reverse-engineering] [th03/th04/th05] High score menu: Entered place 2020-09-12 11:29:09 +02:00
scoredat.inc [Reverse-engineering] [th03/th04/th05] High score menu: Entered place 2020-09-12 11:29:09 +02:00