From a309e3f54901828201980dfb6b88a6e6028cf9e4 Mon Sep 17 00:00:00 2001
From: nmlgc <nmlgc@nmlgc.net>
Date: Sun, 29 Jan 2023 19:08:03 +0100
Subject: [PATCH] [Maintenance] [th01] Avoid direct usage of VRAM plane
 pointers where possible

Might not read as nicely for the 8-dot cases, but makes it easier to
get rid of the pointers if necessary.

Part of P0229, funded by Ember2528.
---
 th01/hardware/grp2xscs.cpp | 27 ++++++++++++++-------------
 th01/hardware/grph1to0.cpp | 16 ++++++++--------
 th01/op_01.cpp             |  2 +-
 3 files changed, 23 insertions(+), 22 deletions(-)

diff --git a/th01/hardware/grp2xscs.cpp b/th01/hardware/grp2xscs.cpp
index c41bc49d..4de6641f 100644
--- a/th01/hardware/grp2xscs.cpp
+++ b/th01/hardware/grp2xscs.cpp
@@ -41,39 +41,40 @@ void graph_2xscale_byterect_1_to_0_slow(
 	dots16_t px16_nonzero;
 
 	for(row = 0; row < h_1; row++) {
-		int p0 = row_p0;
-		int p1 = row_p1;
+		vram_offset_t p0 = row_p0;
+		vram_offset_t p1 = row_p1;
 		for(col16 = 0; col16 < w_1 / 16; col16++) {
-			int scale_p;
+			vram_byte_amount_t scale_p;
 			graph_accesspage_func(1);
 			VRAM_SNAP_PLANAR(px16, p1, 16);
-			px16_nonzero = px16.B | px16.R | px16.G | px16.E;
-			for(scale_p = 0; scale_p < ROW_SIZE * 2; scale_p += ROW_SIZE) {
+			px16_nonzero = (px16.B | px16.R | px16.G | px16.E);
+			for(scale_p = 0; scale_p < (ROW_SIZE * 2); scale_p += ROW_SIZE) {
 				dots32_t dst32;
 				dots32_t px32_nonzero;
 
+				// Parentheses omitted for code generation reasons.
 				graph_accesspage_func(0);
 				scale_2x(px32_nonzero, px16_nonzero);
 				grcg_setcolor_rmw(0);
-				*(dots32_t*)(VRAM_PLANE_B + p0 + scale_p) = px32_nonzero;
+				grcg_put(p0 + scale_p, px32_nonzero, 32);
 				grcg_off();
 
 				scale_2x(dst32, px16.B);
-				*(dots32_t*)(VRAM_PLANE_B + p0 + scale_p) |= dst32;
+				VRAM_CHUNK(B, p0 + scale_p, 32) |= dst32;
 
 				scale_2x(dst32, px16.R);
-				*(dots32_t*)(VRAM_PLANE_R + p0 + scale_p) |= dst32;
+				VRAM_CHUNK(R, p0 + scale_p, 32) |= dst32;
 
 				scale_2x(dst32, px16.G);
-				*(dots32_t*)(VRAM_PLANE_G + p0 + scale_p) |= dst32;
+				VRAM_CHUNK(G, p0 + scale_p, 32) |= dst32;
 
 				scale_2x(dst32, px16.E);
-				*(dots32_t*)(VRAM_PLANE_E + p0 + scale_p) |= dst32;
+				VRAM_CHUNK(E, p0 + scale_p, 32) |= dst32;
 			}
-			p1 += 2;
-			p0 += 4;
+			p1 += static_cast<vram_byte_amount_t>(sizeof(dots16_t));
+			p0 += static_cast<vram_byte_amount_t>(sizeof(dots32_t));
 		}
-		row_p0 += ROW_SIZE * 2;
+		row_p0 += (ROW_SIZE * 2);
 		row_p1 += ROW_SIZE;
 	}
 }
diff --git a/th01/hardware/grph1to0.cpp b/th01/hardware/grph1to0.cpp
index c565ae8e..57be3cf5 100644
--- a/th01/hardware/grph1to0.cpp
+++ b/th01/hardware/grph1to0.cpp
@@ -16,16 +16,16 @@ void graph_hline_unput_masked_8(
 	for(vram_byte_amount_t x = 0; x < vram_w; x++, p++) {
 		if(mask[x]) {
 			graph_accesspage_func(1);
-			px8.B = mask[x] & VRAM_PLANE_B[p];
-			px8.R = mask[x] & VRAM_PLANE_R[p];
-			px8.G = mask[x] & VRAM_PLANE_G[p];
-			px8.E = mask[x] & VRAM_PLANE_E[p];
+			px8.B = mask[x] & VRAM_CHUNK(B, p, 8);
+			px8.R = mask[x] & VRAM_CHUNK(R, p, 8);
+			px8.G = mask[x] & VRAM_CHUNK(G, p, 8);
+			px8.E = mask[x] & VRAM_CHUNK(E, p, 8);
 			graph_accesspage_func(0);
 			vram_erase(p, mask[x], 8);
-			VRAM_PLANE_B[p] |= px8.B;
-			VRAM_PLANE_R[p] |= px8.R;
-			VRAM_PLANE_G[p] |= px8.G;
-			VRAM_PLANE_E[p] |= px8.E;
+			VRAM_CHUNK(B, p, 8) |= px8.B;
+			VRAM_CHUNK(R, p, 8) |= px8.R;
+			VRAM_CHUNK(G, p, 8) |= px8.G;
+			VRAM_CHUNK(E, p, 8) |= px8.E;
 		}
 	}
 }
diff --git a/th01/op_01.cpp b/th01/op_01.cpp
index 52c54dc5..11ec7c57 100644
--- a/th01/op_01.cpp
+++ b/th01/op_01.cpp
@@ -54,7 +54,7 @@ void snap_col_4(void)
 		y = 0;
 		vram_offset = x;
 		while(y < RES_Y) {
-			columns[x][y] = VRAM_PLANE_B[vram_offset];
+			columns[x][y] = VRAM_CHUNK(B, vram_offset, 8);
 			y++;
 			vram_offset += ROW_SIZE;
 		}