mirror of https://github.com/nmlgc/ReC98.git
[Decompilation] [th01] Boss entities: 16×8 section unblitting + blitting
Yet another unused function. No idea what it could have been intended for – no boss sprite has animated sections that small. But come on, out of all places that could have required the macro form of a VRAM offset function, it had to be a unused one… Anyway, that completes the low-level blitting functions for boss entities! Part of P0108, funded by Yanga.
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nmlgc
parent
a2c4aadda9
commit
9ce0034934
5
planar.h
5
planar.h
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@ -64,11 +64,14 @@ extern dots8_t *VRAM_PLANE_G;
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extern dots8_t *VRAM_PLANE_R;
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extern dots8_t *VRAM_PLANE_E;
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#define VRAM_OFFSET_SHIFT(x, y) \
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(x >> 3) + (y << 6) + (y << 4)
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#ifdef __cplusplus
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// MODDERS: Replace with a single function
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static inline unsigned int vram_offset_shift(int x, int y)
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{
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return (x >> 3) + (y << 6) + (y << 4);
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return VRAM_OFFSET_SHIFT(x, y);
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}
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static inline unsigned int vram_offset_muldiv(int x, int y)
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@ -236,6 +236,12 @@ void pascal near vram_put_unaligned_bg_fg(
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vram_put_bg_fg(fg.G, VRAM_PLANE_G, vram_offset, bg.G); \
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vram_put_bg_fg(fg.E, VRAM_PLANE_E, vram_offset, bg.E);
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#define vram_put_bg_word_planar(vram_offset, bg, planes, p) \
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vram_put_bg_fg(planes.B[p], VRAM_PLANE_B, vram_offset, bg.B); \
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vram_put_bg_fg(planes.R[p], VRAM_PLANE_R, vram_offset, bg.R); \
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vram_put_bg_fg(planes.G[p], VRAM_PLANE_G, vram_offset, bg.G); \
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vram_put_bg_fg(planes.E[p], VRAM_PLANE_E, vram_offset, bg.E);
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#define vram_put_unaligned_bg_fg_planar(vram_offset, bg, fg, first_bit) \
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vram_put_unaligned_bg_fg(fg.B, VRAM_PLANE_B, vram_offset, bg.B, first_bit); \
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vram_put_unaligned_bg_fg(fg.R, VRAM_PLANE_R, vram_offset, bg.R, first_bit); \
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@ -453,4 +459,47 @@ void CBossEntity::egc_sloppy_wave_unput_double_broken(
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}
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}
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}
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void CBossEntity::unput_and_put_16x8_8(int bos_left, int bos_top) const
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{
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int16_t vram_offset_row = vram_offset_shift(cur_left, cur_top);
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int bos_row;
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size_t bos_p = 0;
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int intended_y;
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int image = bos_image;
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Planar<dots16_t> bg_masked;
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bos_image_t &bos = bos_images[bos_slot].image[image];
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// Yes, the macro form. Out of all places that could have required it, it
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// had to be an originally unused function…
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vram_offset_row += VRAM_OFFSET_SHIFT(bos_left, bos_top);
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bos_p = (((vram_w / 2) * bos_top) + (bos_left / 16));
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if(bos_image_count <= image) {
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return;
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}
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for(bos_row = 0; bos_row < 8; bos_row++) {
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int16_t vram_offset = vram_offset_row;
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// Note the difference between this and vram_offset_at_intended_y_16()!
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intended_y = (bos_left < 0)
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? ((vram_offset_row / ROW_SIZE) - 1)
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: ((vram_offset_row / ROW_SIZE) - 0);
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if(
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(((vram_offset + 1) / ROW_SIZE) == intended_y) &&
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(vram_offset >= 0) // Clip at the top edge
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) {
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graph_accesspage_func(1);
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vram_snap_masked_planar(bg_masked, vram_offset, bos.alpha[bos_p]);
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graph_accesspage_func(0);
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vram_put_bg_word_planar(vram_offset, bg_masked, bos.planes, bos_p);
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vram_offset += 2;
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}
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bos_p += (vram_w / 2);
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vram_offset_row += ROW_SIZE;
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if(vram_offset_row >= PLANE_SIZE) { // Clip at the bottom edge
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break;
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}
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}
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}
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/// --------
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@ -96,5 +96,13 @@ public:
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int left_2,
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int len_2, int amp_2, int phase_2
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) const;
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// Blits the 16×8 pixels of [bos_image] in [bos_slot] starting at
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// (bos_left, bos_top), relative to the top-left corner of the sprite, to
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// ((⌊cur_left/8⌋ + bos_left/8⌋) * 8, (cur_top + bos_top))
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// after precisely restoring pixels according to the alpha mask of the
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// pixels to be blitted from VRAM page 1.
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// Additionally clips at the top and bottom edges of VRAM.
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void unput_and_put_16x8_8(int bos_left, int bos_top) const;
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/// --------
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};
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208
th01_reiiden.asm
208
th01_reiiden.asm
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@ -8876,9 +8876,6 @@ main_21_TEXT segment byte public 'CODE' use16
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extern @CBossEntity@bos_load$qxnxci:proc
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extern @CBossEntity@bos_metadata_get$xqmimuct1t1:proc
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extern @CBossEntity@put_8$xqiii:proc
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VRAM_SNAP_MASKED procdesc pascal near
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VRAM_PUT_BG_FG procdesc pascal near \
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fg:word, plane:dword, vram_offset:word, bg_masked:word
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extern @CBossEntity@unput_and_put_1line$xqiiii:proc
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extern @CBossEntity@unput_and_put_8$xqiii:proc
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extern @CBossEntity@wave_put$xqiiiiii:proc
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@ -8889,211 +8886,6 @@ main_21__TEXT segment byte public 'CODE' use16
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;org 4
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assume es:nothing, ss:nothing, ds:_DATA, fs:nothing, gs:nothing
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; =============== S U B R O U T I N E =======================================
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; Attributes: bp-based frame
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sub_164E6 proc far
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@@bos = dword ptr -14h
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var_10 = word ptr -10h
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var_E = word ptr -0Eh
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var_C = word ptr -0Ch
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var_A = word ptr -0Ah
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@@image = word ptr -8
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var_6 = word ptr -6
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var_4 = word ptr -4
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var_2 = word ptr -2
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arg_0 = dword ptr 6
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arg_4 = word ptr 0Ah
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arg_6 = word ptr 0Ch
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enter 14h, 0
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push si
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push di
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les bx, [bp+arg_0]
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mov ax, es:[bx]
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sar ax, 3
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mov dx, es:[bx+2]
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shl dx, 6
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add ax, dx
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mov dx, es:[bx+2]
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shl dx, 4
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add ax, dx
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mov [bp+var_2], ax
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xor di, di
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mov ax, es:[bx+24h]
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mov [bp+@@image], ax
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mov al, es:[bx+31h]
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mov ah, 0
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imul ax, size bos_t
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mov dx, [bp+@@image]
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imul dx, size bos_image_t
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add ax, dx
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add ax, offset _bos_images
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mov word ptr [bp+@@bos+2], ds
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mov word ptr [bp+@@bos], ax
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mov ax, [bp+arg_4]
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sar ax, 3
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mov dx, [bp+arg_6]
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shl dx, 6
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add ax, dx
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mov dx, [bp+arg_6]
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shl dx, 4
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add ax, dx
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add [bp+var_2], ax
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mov ax, es:[bx+8]
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cwd
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sub ax, dx
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sar ax, 1
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imul [bp+arg_6]
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push ax
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mov ax, [bp+arg_4]
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mov bx, 10h
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cwd
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idiv bx
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pop dx
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add dx, ax
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mov di, dx
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mov bx, word ptr [bp+arg_0]
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mov ax, es:[bx+20h]
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cmp ax, [bp+@@image]
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jle loc_166CE
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mov [bp+var_4], 0
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jmp loc_166C6
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; ---------------------------------------------------------------------------
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loc_16578:
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mov si, [bp+var_2]
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cmp [bp+arg_4], 0
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jge short loc_1658D
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mov ax, [bp+var_2]
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mov bx, 50h ; 'P'
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cwd
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idiv bx
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dec ax
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jmp short loc_16596
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; ---------------------------------------------------------------------------
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loc_1658D:
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mov ax, [bp+var_2]
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mov bx, 50h ; 'P'
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cwd
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idiv bx
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loc_16596:
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mov [bp+var_6], ax
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lea ax, [si+1]
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mov bx, 50h ; 'P'
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cwd
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idiv bx
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cmp ax, [bp+var_6]
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jnz loc_166AA
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or si, si
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jl loc_166AA
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push 1
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call _graph_accesspage_func
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push ss
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lea ax, [bp+var_10]
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push ax
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pushd [_VRAM_PLANE_B]
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push si
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les bx, [bp+@@bos]
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les bx, es:[bx+bos_image_t.BOS_alpha]
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mov ax, di
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add ax, ax
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add bx, ax
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push word ptr es:[bx]
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call vram_snap_masked
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push ss
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lea ax, [bp+var_E]
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push ax
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pushd [_VRAM_PLANE_R]
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push si
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les bx, [bp+@@bos]
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les bx, es:[bx+bos_image_t.BOS_alpha]
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mov ax, di
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add ax, ax
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add bx, ax
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push word ptr es:[bx]
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call vram_snap_masked
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push ss
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lea ax, [bp+var_C]
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push ax
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pushd [_VRAM_PLANE_G]
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push si
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les bx, [bp+@@bos]
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les bx, es:[bx+bos_image_t.BOS_alpha]
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mov ax, di
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add ax, ax
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add bx, ax
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push word ptr es:[bx]
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call vram_snap_masked
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push ss
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lea ax, [bp+var_A]
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push ax
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pushd [_VRAM_PLANE_E]
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push si
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les bx, [bp+@@bos]
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les bx, es:[bx+bos_image_t.BOS_alpha]
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mov ax, di
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add ax, ax
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add bx, ax
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push word ptr es:[bx]
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call vram_snap_masked
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push 0
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call _graph_accesspage_func
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add sp, 4
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les bx, [bp+@@bos]
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les bx, es:[bx+bos_image_t.BOS_B]
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mov ax, di
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add ax, ax
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add bx, ax
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call vram_put_bg_fg pascal, word ptr es:[bx], large [_VRAM_PLANE_B], si, [bp+var_10]
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les bx, [bp+@@bos]
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les bx, es:[bx+bos_image_t.BOS_R]
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mov ax, di
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add ax, ax
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add bx, ax
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call vram_put_bg_fg pascal, word ptr es:[bx], large [_VRAM_PLANE_R], si, [bp+var_E]
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les bx, [bp+@@bos]
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les bx, es:[bx+bos_image_t.BOS_G]
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mov ax, di
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add ax, ax
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add bx, ax
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call vram_put_bg_fg pascal, word ptr es:[bx], large [_VRAM_PLANE_G], si, [bp+var_C]
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les bx, [bp+@@bos]
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les bx, es:[bx+bos_image_t.BOS_E]
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mov ax, di
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add ax, ax
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add bx, ax
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call vram_put_bg_fg pascal, word ptr es:[bx], large [_VRAM_PLANE_E], si, [bp+var_A]
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add si, 2
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loc_166AA:
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les bx, [bp+arg_0]
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mov ax, es:[bx+8]
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cwd
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sub ax, dx
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sar ax, 1
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add di, ax
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add [bp+var_2], 50h ; 'P'
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cmp [bp+var_2], 7D00h
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jge short loc_166CE
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inc [bp+var_4]
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loc_166C6:
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cmp [bp+var_4], 8
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jl loc_16578
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loc_166CE:
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pop di
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pop si
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leave
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retf
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sub_164E6 endp
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; =============== S U B R O U T I N E =======================================
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; Attributes: bp-based frame
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