From 0dfe3bc3c9d04f2bcc058c107386022ab2e39455 Mon Sep 17 00:00:00 2001
From: nmlgc <nmlgc@nmlgc.net>
Date: Tue, 16 Feb 2021 18:24:41 +0100
Subject: [PATCH] [Decompilation] [th05] .PI: EGC setup for masked blitting

And again.

Part of P0134, funded by [Anonymous].
---
 th05/formats/pi_cpp_2.cpp      | 34 ++++++++++++++++++++++++++++++++++
 th05/formats/pi_put_masked.asm | 25 +++----------------------
 2 files changed, 37 insertions(+), 22 deletions(-)

diff --git a/th05/formats/pi_cpp_2.cpp b/th05/formats/pi_cpp_2.cpp
index 166a2006..cbf212ce 100644
--- a/th05/formats/pi_cpp_2.cpp
+++ b/th05/formats/pi_cpp_2.cpp
@@ -5,12 +5,16 @@
 extern "C" {
 #include <stddef.h>
 #include "platform.h"
+#include "x86real.h"
 #include "pc98.h"
 #include "planar.h"
 #include "master.hpp"
 #include "th05/formats/pi.h"
 #include "th05/formats/pi_impl.hpp"
 
+extern dots16_t near *pi_mask_ptr;
+extern unsigned int pi_mask_y;
+
 // Additionally takes:
 // • `void far *pi_buf` in ES:SI
 // • `pixel_t h` in DI
@@ -18,6 +22,36 @@ void pascal near pi_put_8_rowloop(
 	screen_x_t left, vram_y_t top, pixel_t w, size_t stride_packed
 );
 
+#pragma option -k-
+
+// MODDERS: Just give egc_setup_copy() a mask parameter and remove this
+// abomination of a function.
+void near pi_mask_setup_egc_and_advance(void)
+{
+	#define mask_ptr   	_BX
+
+	egc_on();
+	outport2(EGC_ACTIVEPLANEREG, 0xFFF0);
+	outport2(EGC_READPLANEREG, 0xFF);
+	// EGC_COMPAREREAD | EGC_WS_PATREG | EGC_RL_MEMREAD
+	outport2(EGC_MODE_ROP_REG, 0x3100);
+	// Turbo C++ is too smart to emit this instruction with pseudo-registers!
+	__asm { mov ax, 0; }
+	outport(EGC_ADDRRESSREG, _AX);
+	outport2(EGC_BITLENGTHREG, 0xF);
+
+	mask_ptr = reinterpret_cast<uint16_t>(pi_mask_ptr);
+	_AX = (pi_mask_y & (PI_MASK_H - 1));
+	__asm { shl ax, 1; } // And again!
+	mask_ptr += _AX;
+	outport(EGC_MASKREG, *reinterpret_cast<dots16_t near *>(mask_ptr));
+	pi_mask_y++;
+
+	#undef mask_ptr
+}
+
+#pragma option -k
+
 int DEFCONV pi_load(int slot, const char *fn)
 {
 	_DI = slot;
diff --git a/th05/formats/pi_put_masked.asm b/th05/formats/pi_put_masked.asm
index ea627727..c9d2f873 100644
--- a/th05/formats/pi_put_masked.asm
+++ b/th05/formats/pi_put_masked.asm
@@ -1,3 +1,5 @@
+_pi_mask_setup_egc_and_advance procdesc near
+
 public PI_PUT_MASKED_8
 pi_put_masked_8 proc far
 @@mask_id	= word ptr  6
@@ -125,7 +127,7 @@ TEMP_ROW = RES_Y
 	sub	_pi_put_masked_vram_offset, PLANE_SIZE
 
 @@next_row:
-	call	egc_setup_copy_with_pi_mask
+	call	_pi_mask_setup_egc_and_advance
 	mov	ax, GRAM_400
 	mov	es, ax
 	assume es:nothing
@@ -153,24 +155,3 @@ TEMP_ROW = RES_Y
 	jnz	short @@put_row
 	retn	8
 pi_put_masked_8_rowloop endp
-
-
-; ---------------------------------------------------------------------------
-
-
-egc_setup_copy_with_pi_mask proc near
-	call	egc_on
-	outw2	EGC_ACTIVEPLANEREG, 0FFF0h
-	egc_selectpat
-	egc_setrop	EGC_COMPAREREAD or EGC_WS_PATREG or EGC_RL_MEMREAD
-	outw2	EGC_ADDRRESSREG, 0
-	outw2	EGC_BITLENGTHREG, 0Fh
-	mov	bx, _pi_mask_ptr
-	mov	ax, _pi_mask_y
-	and	ax, 3
-	shl	ax, 1
-	add	bx, ax
-	outw2	EGC_MASKREG, [bx]
-	inc	_pi_mask_y
-	retn
-egc_setup_copy_with_pi_mask endp