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ReC98/th04/main/tile/tile.inc

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[Reverse-engineering] [th02/th04/th05] Stage tiles: VRAM source area offsets Part of P0235, funded by Ember2528.
2023-01-19 17:05:10 +00:00
include th02/main/tile/tile.inc
[Reverse-engineering] [th04/th05] Stage tiles: Initial ring buffer filling …Wow. A 32-element lookup table for the very computationally expensive operation of (i * 320), needlessly limiting the amount of unique 384×80 tile sections in a stage to 32… and then TH05 further "optimizes" this lookup by pre-multiplying all section IDs in the .STD file with the element size of that table, to save a grand total of 1 x86 instruction. Part of P0112, funded by [Anonymous] and Blue Bolt.
2020-08-26 19:55:08 +00:00
TILE_ROWS_PER_SECTION = 5
TILE_SECTION_COUNT_MAX = 32